Ruhul Quddus Email & Phone Number

Gilbert, Az, Us

Chandler, Arizona, United States

In addition to the managerial role, at personal capacity, leading the definition and architecture of IOTG's unique core product line. As IOTG introduces its very own products to market, it needs to be defined from silicon features to platform solutions, including package, socket, reference boards etc.Responsible for setting POR features for silicon, how to address various silicon scalability in multiple packages, define what silicon features/interface speed is possible through socket, set TDP and performance goals, set target board directions, features, etc. Identify both hardware and software technology readiness needed before execution and identify system solutions to target use cases.

Chandler, Arizona, United States

Managing IOTG's platform architecture team of diverse talents. Charter includes defining product requirements for IOTG roadmap, writing platform architecture specs, analyze use cases and workloads, define target systems & solutions, work with various Intel wide partners to advance IOTG unique need and requirements in silicon.IOTG customer asks and usages are different. Task includes finding unique technical solution to meet those needs. At the same time, team explores various technical possibility options for IOTG's growth by analyzing various product or platform ideas.

Portland, Oregon Area

Leading CCG’s core engineering team on next generation products and full system optimization. Main charter of this role is to define a system and work with every aspects of the system that provides clear guidance to various engineering teams, set design optimization goals and work with lead customers/OEM/ODM to design the most optimum system for given business objective.For the long term products, working with various planning and strategic teams to align on Intel’s goal/vision for next gen product and help build concept of a system that will meet the goal, set clear objective for various engineering team for possible solution and enabling work.

Portland, Oregon Area

Leading two teams encompassing Atom and Core processor based Chromebooks. Charter includes full system architecture, enable generic Chrome reference designs in partnership with Google and ODM, system cost analysis, HW debug and validation, enabling ODM with platform design detail knowledge, driving lead OEM design to first successful product of a processor generation and support follow on scaling products based on the reference design.

Portland, Oregon Area

De-facto engineering manager of Hardware team. Supporting all hardware aspects of very fast growing Chromebooks markets and large design wins. Led 2 Core and 2 Atom processor based Chromebook and Chromebox designs. Hands on designing experience of electrical, mechanical and thermal aspects of reference designs leading to a cost optimized and OEM ready reference. Supported debug / validation and HVM production of multiple designs.

Portland, Oregon Area

Electrical systems lead for Windows software development and solutions systems (SDS). Defined Broadwell system signal and power integrity architecture.

Portland, Oregon Area

Led multiple product power delivery designs and decisions, drove industry to adopt new power delivery technology, established new design methodology, designed package and motherboards for optimal condition, published design specs and models for internal and external customers.

Phoenix, Arizona Area

Led multiple product power delivery designs and decisions, drove industry to adopt new power delivery technology, established new design methodology, designed package and motherboards for optimal condition, published design specs and models for internal and external customers.

Phoenix, Arizona Area

Responsible for Interconnect design, interface timing assessment, customer design guidelines, package ball-out specifications, I/O characteristics, timing in memory controller and validation boards signal integrity and power delivery. These requires in depth knowledge and design idea on I/O circuit design, memory controller, high-speed digital design, PCB layout, and PCB technology

Phoenix, Arizona Area

Synthesis of Circuits. Compiling and meeting different timing issues. Modeled and characterized different types of packages and resolved in-silicon signal Integrity issues.

Phoenix, Arizona Area

Dealt with major signal integrity issues like reflection, cross-talk, simultaneous switching noise in high density, high operating frequency boards.

Bangladesh

Took Lots of Sophomore Electrical Courses including circuit design, electrical machines and various lab sessions.

Master Of Science (M.S.), Electrical And Electronics Engineering, 3.67

Bachelor Of Science (B.Sc.), Electrical And Electronics Engineering, 3.82

Graduated with Honor’s. Was in Dean’s list for 2 consecutive years.