Embedded Sram Lead Designer (Mgts)
Design Lead and Project Management - TI ASIC Memory Group Responsible for all aspects of project design for deep submicron CMOS single and multi-port SRAM, and ROM memory compilers. Duties included interaction with internal and external business units to define and draft product specifications, schematic capture, circuit simulation, design layout, characterization, model creation, datasheet generation, design reviews to peers and product marketing. End applications included cellular… Show more Design Lead and Project Management - TI ASIC Memory Group Responsible for all aspects of project design for deep submicron CMOS single and multi-port SRAM, and ROM memory compilers. Duties included interaction with internal and external business units to define and draft product specifications, schematic capture, circuit simulation, design layout, characterization, model creation, datasheet generation, design reviews to peers and product marketing. End applications included cellular phones, DSP, HDD, digital cameras, routers and networking equipment, and other ASIC products. Innovations include TI's first VIA programmable ROM, design of TI's 1st 1Mb single instance ASIC SRAM compiler, memory periphery auto-place tool, fast single port regsiter file for C64x DSP, 2-port embedded SRAM design, participation in TI efuse development. Mentor to engineering interns and new hires. Show less