Rod Whitby Email & Phone Number

When Freescale closed it's Adelaide office in March 2006, Rod joined up with four of his management colleagues from Freescale to form a new company focusing on technical consulting in the SoC design and embedded software development industry.

Rod was the founder of the NSLU2-Linux and WebOS Internals open-source projects, and led these projects in his spare time.

In July 2004, Motorola spun off its semiconductor design and manufacturing operations to form Freescale Semiconductor and the Adelaide-based SoC design centre became the core of Freescale Semiconductor's operation in Australia.Rod held the positions of Chief Engineer and Chief SoC Architect at Freescale's Australian SoC Technology Centre, architecting the most complex SoC networking devices ever developed in the Southern Hemisphere.Rod's major projects during that period included:SoC Architect for the MPC8568 network processor. Complete responsibility for application scenario definition, SoC system architecture, and oversight of the SoC design and implementation.SoC Architect for a customer-specific e600-based high performance computing entertainment platform targeting the high-end Japanese pachinko and gaming markets.Development of a system-level performance analysis methodology for carrier-grade wired network processors, and deployment of this methodology to the MPC856X family of network processors.Development of a system-level validation methodology for carrier-grade wired network processors. This methodology used representative network software stack procedures to fully validate the operation of a new networking SoC design for the application scenarios required by alpha customers, and was deployed on the MPC85XX family of network processors.

Rod was a founding member of the Motorola Australia Software Centre in December 1994.He led a number of varied projects in areas such as SoC Design, Modelling & Simulation, and development of Computer Aided Design Tools.During his time at Motorola, Rod was instrumental in founding and continuing to develop a world-class SoC design capability for Motorola in Australia.Rod's major projects during that period included:Hardware/Software architecture and design of an 802.11 wireless SoC IP block and corresponding software stack.Architecture, design and implementation of a methodology and tool-set for synthesis of application-specific processors from formal instruction set descriptions to implementation Verilog RTL designs. Deployment of this design methodology into the wireless business design flow, where it was used to implement an interprocessor communications engine.Development of a fully static, synthesizable, retargetable, cycle-accurate, bug-correct, implementation of the Motorola 68000 core. This implementation was used by many customers of Motorola, including Palm and Sony for their PDA range.

Rod was initially responsible for the algorithmic research, behavioural VHDL modelling and gate-array implementation of the line dispatcher subsystem of a high-speed image processing system enabling plug-and-play connection of a low refresh rate ferroelectric liquid crystal display (FLCD) to normal workstation CRT outputs.Rod also developed software tools to support functional testing of the fabricated chips in the production system, including a Tcl/Tk interface to the on-board monitor (allowing real-time on-screen control of the display algorithms), and tools to supply input vectors through an in-house high-speed pattern generator and acquire results from a HP logic analyser.In addition to his ASIC design work at Canon, Rod also developed methodologies and process flow support tools for ASIC design and cross-verification of behavioural VHDL and gate-level schematic models, and continued his work on tools for ASIC design productivity enhancement.

Rod was initially responsible for the implementation (using VHDL synthesis to standard cells and full-custom design) of macrocells for an 80386-based write-through cache controller and an 80386-based integrated memory controller.He also developed and maintained CAD tools for the conversion of logical equations to other formats (including VHDL), a high-level language front-end to analogue simulators (including PSPICE, HSPICE, and an in-house switch-level simulator), and other X Window tools for ASIC design productivity enhancement.In January 1991, Rod took up an 8 month posting with Austek's Santa Clara office in California, where he developed a bus-functional VHDL behavioural model of the i486 microprocessor, and a VHDL verification framework for a full-system simulation of an EISA system.After returning to Adelaide in September 1991, Rod was responsible for the implementation of macrocells for an i486-based write-back cache controller.