Ryan Mcghee Email & Phone Number

After Texas Instruments acquisition of Micron Lehi, UT facility, my role and job responsibilities expanded. Along with processes involving striping and cleaning test wafers, ownership of the processes re-applying the proper films, prior to being used as a qual/monitor, was added. I started TI’s first network wide TW process development & sharing forum to compare common metrics across the network. This included working across multiple fabs to discuss, develop, and implement BKMs (Best Known Methods) for processes, proper tooling, and inventory management methods. This resulted in improvements to ALL TI factories capabilities and therefore reducing overall TI spending for silicon (26% reduction in silicon spending)

After Micron acquisition of IM Flash Technology, I continued in my role as Engineering manager for the NPW/TW Department. Led and helped create TW recycle processes that were best in class at Micron for key metrics; best in class quality by 4x, best in class output by 35%, best in class cost per wafer by 45%. Continued to expand departmental responsibility set to improve overall efficiency for all aspects of factory qual needs and improving product quality through reducing false fails on quals and facilitating a heightened quality culture throughout the factory. Added responsibility for forecasting silicon usage, qualifying vendors for consumables (pads, chems, parts, etc.), projecting tool capacity changes, and partnering with R&D department to design qualification plans for new product and continuous improvement through life-cycle of part.

Responsible for managing/developing supervisors, engineers, and technicians. Department responsibilities included all non-production-based wafers including test wafers (TW), engineering wafers, and topography (TOPO) wafers. Developing metrics to monitor all aspects of the department. Setting expectations for supporting all process areas, optimizing the usage and recycle process for all TWs and reducing TW costs to the factory. Led interdepartmental efforts to optimize/improve TW recycle process resulting in over $650k / month in savings.

Driving experiments to develop/improve the wafer manufacturing process used in microprocessor and logic designs including extensive experience with DOE’s to improve device capability/functionality. Monitor/analyze process improvements aligned with all critical vectors (cost, velocity, quality). Leading engineering teams to address complex integrated issues, insuring cadence to goals, and communication between all departments involved.

Led numerous projects involving cross-departmental teams including chemical changes/end-of-life & chemical usage reduction for both wet etch & photolithography departments, resulting in over $100 of savings per wafer and over 20 hrs of cycle-time by combining/eliminating operations. Also led multiple LEAN manufacturing events, including kaizen events, swarms, and map-days on a wide range of topics (shift-to-shift passdown flow, test wafer reduction, and work-flow waste elimination/ standardization) resulting in over 200 labor-hours saved per week

Managing a group of 4-8 engineers. Ownership responsibilities included all FOUP/FOSB types (cleaning, maintenance, & allocation); all wafer transfer/sorting tools, Si starts room activities, and scrap processes. Leveraging direct engineering reports to maintain cadence on critical projects and support factory objectives. Driving a safety-first culture in all activities. Created a strong culture of continuous improvement with engineers and techs to drive waste elimination and task standardization. Promoted highly motivated, strong team environment focusing on autonomy, mastery, and purpose while removing “road-blocks” to success. Guided direct reports in career development for both managerial and technical paths.

Responsible for in-line defect and cycle-time performance of a particular section of the process line. Activities included setting expectations for area representatives to address both tactical and strategic objectives. Reporting out to all levels of factory management on segment performance. During tenor as IST leader the team improved defect performance by~12% (3%+ die impact) while not impacting cycle-time negatively.

Tool ownership of multiple processes through start-up, ramp, and high-volume sustaining activities. Direct ownership of both single spin and batch processing tools. Led multiple teams through structured Model Based Problem Solving (MBPS) methodology to improve key metrics (safety, cost, velocity, quality). Results included a 12% improvement in availability, 2 significant changes in safety protocols, 3hr reduction in avg. weekly PM downtime, & a 15% reduction in qual fails. Trained new or struggling engineers on to improve overall team capability.

Back-up lead engineer for a group of 12-15 engineers and technicians. Directing daily sustaining work, delivering module metrics for team, leading sub-teams of engineers on quality, defect, and utilization improvements. Extensive project work (both individual and as a team leader for quality teams) to improve existing methods and procedures to reduce scrap and increase yield.

Operates manufacturing equipment in the Thin Films Department for one of the leading manufacturers of computer semiconductors (Novellus machines).