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Sambit Pal is listed as Digital Specialist @ Verilog Digital System Design | VLSI CAD at FAU Erlangen-Nürnberg, based in Faridabad, Haryana, India. AeroLeads shows a matched LinkedIn profile for Sambit Pal.
Sambit Pal previously worked as Digital Specialist at Verilog Digital System Design and Neuromorphic VLSI at Silicon Neuron. Sambit Pal holds Master Of Technology - Mtech, Electrical, Electronics And Communications Engineering from Indian Institute Of Technology, Madras.
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As a Digital Specialist at Verilog Digital System Design, my focus has been on the intricate design of datapaths and control paths for state-of-the-art single-cycle RISC V 32-bit processors, leveraging my strong foundation in VLSI CAD from IIT Bhubaneswar. The successful simulation of a RISC-V ISA processor, validating its functionality, stands as a testament to the practical applications of my academic rigor.With a penchant for detail, the schematics and layout designs I crafted for Voltage Amplifiers at Silicon Neuron exemplify my capability to perform complex pre and post-layout simulations, ensuring superior design integrity. These technical endeavors reflect my dedication to engineering precision and my aspiration to innovate within the field of electrical and electronics engineering.
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Designed the datapath for a single-cycle RISC V 32-bit processor in Vivado using Verilog.Deisgned the control path for the single-cycle RISC V 32-bit processor in Vivado using Verilog.Simulated the RISC-V single cycle 32-bit ISA processor using a testbench of sum of series of n numbers
Designed a schematic of a Voltage Amplifier SiN in Cadence Virtuoso.Further, the layout for the Voltage Amplifier SiN was also made.Pre- layout and post layout simulations were performed for the neuron and the results were compared
Designed a schematic of a Voltage Amplifier SiN in Cadence Virtuoso.Further, the layout for the Voltage Amplifier SiN was also made.Pre- layout and post layout simulations were performed for the neuron and the results were compared
Worked on designing a FMA (Fused Multiplier-Adder) for bFloat 16 numbers using Verilog in Vivado.Simulations were carried out to check the correctness of the design.Correct design was further implemented on FPGA Basys3.
Worked on designing a FMA (Fused Multiplier-Adder) for bFloat 16 numbers using Verilog in Vivado.Simulations were carried out to check the correctness of the design.Correct design was further implemented on FPGA Basys3.
Guideline Enforcer in Covid Protocol Management Team to ensure COVID guidelines are followed strictly during various fests and events held in institute.
Microelectronics and VLSI program
Activities and Societies: Covid management, member in Quant and business clubLooking for job in ECE bakground or options for MS in ECE
Activities and Societies: Football
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Sambit Pal works for FAU Erlangen-Nürnberg.
Sambit Pal is listed as Digital Specialist @ Verilog Digital System Design | VLSI CAD at FAU Erlangen-Nürnberg.
Sambit Pal is based in Faridabad, Haryana, India while working with FAU Erlangen-Nürnberg.
Sambit Pal has worked for Verilog Digital System Design, Silicon Neuron, Vivado Digital System Design, Fau Erlangen-Nürnberg, and Covid Protocol Management Team.
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Sambit Pal holds Master Of Technology - Mtech, Electrical, Electronics And Communications Engineering from Indian Institute Of Technology, Madras.
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