Test, And Validation Engineering Manager
Current
Dec 2020 - Present
AeroLeads people directory · profile
Sanjeev M. Email & Phone Number
Test, and Validation Engineering Manager @ Texas Instruments
at
Texas Instruments
1 work email found
@ti.com
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✓ Verified July 2026
4 data sources
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Current company
Role
Test, and Validation Engineering Manager @ Texas Instruments
Location
San Francisco Bay Area, United States
Who is Sanjeev M.? Overview
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Quick answer
Sanjeev M. is listed as Test, and Validation Engineering Manager @ Texas Instruments at Texas Instruments, based in San Francisco Bay Area, United States. AeroLeads shows a work email signal at ti.com and a matched LinkedIn profile for Sanjeev M..
Sanjeev M. previously worked as Test, and Validation Engineering Manager at Texas Instruments and Test, Product and Qualification engineering manager at Texas Instruments. Sanjeev M. holds Ms, Electrical Engineering - Analog, Mixed Signal And Rf Circuit Design Courses from San José State University.
Company email context
Email format at Texas Instruments
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*@ti.com
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Profile bio
About Sanjeev M.
With over 12 years of experience in the semiconductor industry, I am a Test, and Validation Engineering Manager at Texas Instruments, a leading global company in analog and embedded processing technologies. I hold a Master of Science degree in Electrical Engineering, with a focus on analog, mixed signal, and RF circuit design.I lead a team of engineers who are responsible for testing, validating, and debugging new devices in the Analog Signal Chain family, which are used for various applications such as industrial, automotive, and consumer electronics. My mission is to deliver high-quality and reliable products that meet the needs and expectations of our customers and partners. To achieve this, I leverage my skills in ATE systems, and Analog circuits to develop and maintain C/C++/Python code for test automation and data analysis. I also design and implement new hardware solutions to increase the test throughput and efficiency. Additionally, I work closely with vendors on PCB layout, fabrication, and assembly, and mentor interns and new college graduates.
Listed skills include Analog Circuit Design, Ic, Cadence Virtuoso, Cmos, and 23 others.
Current workplace
Sanjeev M.'s current company
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8 roles
Sanjeev M. work experience
A career timeline built from the work history available for this profile.
Test, Product And Qualification Engineering Manager
Jan 2020 - Dec 2020
Hardware Validation Engineer
a) Lead validation engineer in the product line for new devices in the Analog Signal Chain familyb) Develop and maintain code in LabVIEW, TestStand and Pythonc) Develop new hardware to test new portfolio of devicesd) Increase throughput by designing multi-site test modulesf) Work with vendors on layout, fabrication and assembly of PCBg) Mentor interns and new college graduates
Sep 2017 - Jan 2020
Hardware Test Development Engineer
a) Design test development PCB based on device complexity and functionality.b) Use ATE and test boards to verify DUT.c) Develop scripts in VB and C++ to characterize IC at wafer and package level.d) Responsible for product release to production and manufacturing at assembly/test sites.e) Understand ATE and implement ways to reduce test time.f) Work with vendors on layout, fabrication and assembly of PCB.g) Mentor interns and new college graduates
Feb 2014 - Sep 2017
Hardware Test Development Engineer
a) Design PCBs for testing new designs at wafer and at package level.b) Develop scripts in VB and C++ to characterize ICs and release for production.c) Understand ATE and implement ways to reduce test time.
Aug 2012 - Feb 2014
Hardware Test Development Intern
Jun 2012 - Aug 2012
Wlan Board Design, Graduate Intern
a) Design power supply adapter board: using LDO and OP-AMP for adjustable output voltage with feedback from DUTs. b) Work and learn from board designers to layout WLAN boards and ways to improve and solve problems.c) Filter and Matching circuit design using Microwave Office for G-Band (2.5GHz)d) Conduct test to characterize hardware designs (EVM, PER, TSSI, Phase Noise, S-parameters tests) and modify Shell/TCL scripts.e) Documentation of test results, data and store it in group intranet.
Jun 2011 - May 2012
Fpga Design And Verification Intern
a) Designed and verified 'Digital Snakes' systems for multiplexing 32 audio channels on Ethernet cable using MaGIC protocol. b) Worked on serial protocols like - I2C,I2S, SPI, RMII
May 2010 - Aug 2010
Team & coworkers
Colleagues at Texas Instruments
Other employees you can reach at ti.com. View company contacts →
RC
Rob Carreon
Colleague at Texas InstrumentsDallas, Texas, United States
View →
GE
Graciela Elizabeth Vega Villalobos
Colleague at Texas InstrumentsAguascalientes, Mexico
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CG
Christopher Garner
Colleague at Texas InstrumentsMckinney, Texas, United States
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KG
K Gray
Colleague at Texas InstrumentsUnited States
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VM
Vennette Mañalac Navarro
Colleague at Texas InstrumentsCentral Luzon, Philippines
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TC
Timothy Cartier
Colleague at Texas InstrumentsGarland, Texas, United States
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SM
Sal Monella
Colleague at Texas InstrumentsDallas, Texas, United States
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FM
Faheem Mohamedi
Colleague at Texas InstrumentsRichardson, Texas, United States
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GA
G Anand Kumar
Colleague at Texas InstrumentsBengaluru, Karnataka, India
View →
MO
Matthew Ochoa
Colleague at Texas InstrumentsDallas, Texas, United States
View →
Rob Carreon
Colleague at Texas InstrumentsDallas, Texas, United States
View →
GE
Graciela Elizabeth Vega Villalobos
Colleague at Texas InstrumentsAguascalientes, Mexico
View →
CG
Christopher Garner
Colleague at Texas InstrumentsMckinney, Texas, United States
View →
KG
K Gray
Colleague at Texas InstrumentsUnited States
View →
VM
Vennette Mañalac Navarro
Colleague at Texas InstrumentsCentral Luzon, Philippines
View →
TC
Timothy Cartier
Colleague at Texas InstrumentsGarland, Texas, United States
View →
SM
Sal Monella
Colleague at Texas InstrumentsDallas, Texas, United States
View →
FM
Faheem Mohamedi
Colleague at Texas InstrumentsRichardson, Texas, United States
View →
GA
G Anand Kumar
Colleague at Texas InstrumentsBengaluru, Karnataka, India
View →
MO
Matthew Ochoa
Colleague at Texas InstrumentsDallas, Texas, United States
View →
2 education records
Sanjeev M. education
Ms, Electrical Engineering - Analog, Mixed Signal And Rf Circuit Design Courses
San José State University
Bachelor Of Engineering - Be, Electronics
University Of Mumbai
FAQ
Frequently asked questions about Sanjeev M.
Quick answers generated from the profile data available on this page.
What company does Sanjeev M. work for?
Sanjeev M. works for Texas Instruments.
What is Sanjeev M.'s role at Texas Instruments?
Sanjeev M. is listed as Test, and Validation Engineering Manager @ Texas Instruments at Texas Instruments.
What is Sanjeev M.'s email address?
AeroLeads has found 1 work email signal at @ti.com for Sanjeev M. at Texas Instruments.
Where is Sanjeev M. based?
Sanjeev M. is based in San Francisco Bay Area, United States while working with Texas Instruments.
What companies has Sanjeev M. worked for?
Sanjeev M. has worked for Texas Instruments, Broadcom, and Network Sound.
Who are Sanjeev M.'s colleagues at Texas Instruments?
Sanjeev M.'s colleagues at Texas Instruments include Rob Carreon, Graciela Elizabeth Vega Villalobos, Christopher Garner, K Gray, and Vennette Mañalac Navarro.
How can I contact Sanjeev M.?
You can use AeroLeads to view verified contact signals for Sanjeev M. at Texas Instruments, including work email, phone, and LinkedIn data when available.
What schools did Sanjeev M. attend?
Sanjeev M. holds Ms, Electrical Engineering - Analog, Mixed Signal And Rf Circuit Design Courses from San José State University.
What skills is Sanjeev M. known for?
Sanjeev M. is listed with skills including Analog Circuit Design, Ic, Cadence Virtuoso, Cmos, Mixed Signal, Vlsi, Cadence, and Rf.
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