Ser Seong Ng work email
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- Been in the semiconductor post silicon fields since 2011, with the experience of System Validation Engineer, Electrical Validation Engineer and latest one would be System Level Test Engineer in product development.- Experience in semiconductor Integrated Circuit R&D across field of system architecture, post-silicon enabling, electrical validation, silicon debug, customer on site support, test program development. - Handling customer issues from different business units and different products including PC/laptop, tablet, smartphone, and embedded solution. - Experience in using high speed oscilloscope, protocol analyzer, logic analyzer for debug and measurement.- Hands-on debugging/triaging experience using JTAG Lauterbach/Trace32 with Python- Able to communicate fluently both English & Chinese to support regional customers mainly from China and Taiwan.- Possess with strong positive working attitude and willingness to learn and improve continuously.
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Manager, Product Development EngineeringAmdSingapore -
Member Of Technical Staff (Mts) Product Development EngineerAmd Jul 2021 - PresentSingaporeLead and manages current active semi custom products System Level Test program planning, evaluation, development and resource planning to ensure product success.Drive for High Volume Manufacturing KPIsImprove data analytic efficiency with innovative data visualization program such as PowerBI to streamline and standardize the team analysis workflow that got adopted and implemented company wide.Mentor and guide junior team members to fully understand the concepts and motivations behind every tasks and works assigned. -
Senior Product Development EngineerAmd Mar 2018 - Jul 2021SingaporeSystem Level Test Engineer Debug and manage manufacturing and characterisation test programs for next-generation AMD semi custom microprocessors.Perform system level test (SLT )Test program integration, validation and release for high volume manufacturing (HVM) operation.To manage product yield, test time to meet target and drive initiatives for yield or test time improvement. -
Customer Debug & Enabling EngineerIntel Corporation Oct 2014 - Mar 2018Penang, MalaysiaLed debug task forces across sites and provided debug next step and solution to resolve customer gating issues.Involved in various SoC interface system level functional debug for post product launch customer issues such as USB, Power Management, I2C, SVID, SDIO, PMIC with interaction with BIOS, Firmware and Driver in OS environment.Showcased debug technicalities in regional customer enabling workshop by correlated 68% of known silicon bug, discovered 2% of new bug and identified 3% of bug that requires fine tuning on customer systems. Receives multiple recognition of departmental exceptional & superior achievement award for excelling at customer satisfaction with on site customer support.Provided debug support for OEM & ODM customers to resolve the mass production build gating, shipment holding issues, compliance certification failure. Developed debug scripts for Intel next generation SoC power on activities -
Electrical Validation EngineerIntel Corporation Jun 2012 - Oct 2014Penang, MalaysiaDelivered and executed test plan, methodologies, scripts and test execution for 2 generations of Intel chipsets high speed I/O (USB3.0) to meet both industrial compliance and internal product release qualification requirements.Owned content development and test plan for signal marginality validation on Intel test chip power on activity and successfully identified 2 DFx related bug.Successfully root caused and resolves new stepping gating silicon issues by collaborating with system validation team to intercept the design changes.Conducted the initiation for device qualification Tx compliance test for new test methodology on next generation intel chipset.Enabled new topology such as M.2 and Intel RealSense camera validation test methodology. -
Electrical Validation EngineerNcs Information System Jun 2011 - May 2012Conducted and carried out electrical validation test cases for Intel next generation chipsets I/O interfaces as contract workers. Troubleshooting on platform level setup with system hardware assembling, operating system installation, BIOS programming and test case implementations.Completed and arranged electrical test execution on Intel next generation chipsets according to time frame as planned and supported multiple out of scope debug request to achieve product release requirement.Converted as Intel permanent employees prior contract completion.
Ser Seong Ng Skills
Ser Seong Ng Education Details
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Electrical And Electronics Engineering
Frequently Asked Questions about Ser Seong Ng
What company does Ser Seong Ng work for?
Ser Seong Ng works for Amd
What is Ser Seong Ng's role at the current company?
Ser Seong Ng's current role is Manager, Product Development Engineering.
What is Ser Seong Ng's email address?
Ser Seong Ng's email address is se****@****amd.com
What schools did Ser Seong Ng attend?
Ser Seong Ng attended Universiti Tunku Abdul Rahman (Utar).
What skills is Ser Seong Ng known for?
Ser Seong Ng has skills like System On A Chip, Validation, Semiconductors, Debugging, Integrated Circuits, Debuggers, Test Planning, Soc, Computer System Validation, Ielts, Embedded Systems, Electronics.
Who are Ser Seong Ng's colleagues?
Ser Seong Ng's colleagues are Sathya Narayanan, Ganesh Patra, Md Altamas Alam, Narendra Vemula, Maurice Madril, Asad Ali, Mike Sprayberry.
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