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Simon Tan Email & Phone Number

Senior Hardware Design Engineer
Location: Hacienda Heights, California, United States 9 work roles 2 schools
1 work email found @3m.com 2 phones found area 626 LinkedIn matched
✓ Verified Jun 2026 4 data sources Profile completeness 86%

Contact Signals · 1 work email · 2 phones

Work email s****@3m.com
Direct phone (626) ***-****
LinkedIn Profile matched
3 free lookups remaining · No credit card
Role
Senior Hardware Design Engineer
Location
Hacienda Heights, California, United States

Who is Simon Tan? Overview

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Quick answer

Simon Tan is listed as Senior Hardware Design Engineer based in Hacienda Heights, California, United States. AeroLeads shows a work email signal at 3m.com, phone signal with area code 626, and a matched LinkedIn profile for Simon Tan.

Simon Tan previously worked as Specialist Senior Hardware Design Engineer at Thales Digital Identity & Security and Specialist Senior Electrical Design Engineer at Gemalto (Now Thales Digital Identity & Security). Simon Tan holds Master Of Science - Ms, Computer Science from Pacific States University.

Company email context

Email format at 3m.com

This section adds company-level context without repeating Simon Tan's masked contact details.

{first_initial}{last}@3m.com
86% confidence

AeroLeads found 1 current-domain work email signal for Simon Tan. Compare company email patterns before reaching out.

Profile bio

About Simon Tan

Simon Tan is a Senior Hardware Design Engineer.

Listed skills include Debugging, Embedded Systems, Integration, Semiconductors, and 1 others.

9 roles

Simon Tan work experience

A career timeline built from the work history available for this profile.

Specialist Senior Hardware Design Engineer

Thales Digital Identity & Security

Pasadena, California, United States

  • PCIe-3 ADMA fingerprint latent filter FPGA of DB server PMA card.
  • Live multi-biometric capture system.
  • USB Biometric Scanners.
Apr 2019 - Jan 2021

Principal Hardware Engineer

3M Cogent

Pasadena, California, United States

  • PCIe-3 Advanced DMA & fingerprint pattern filter FPGA of DB server PMA add-on card.
  • PCIe-1 Advanced DMA & fingerprint pattern filter FPGA of DB server PMA add-on card.
  • PCI-X DMA & fingerprint pattern filter FPGA of DB server PatternMatchAccelerator add-on card.
  • ARM based multi-biometric handheld mobile devices.
  • ARM based biometric access gate control products.
  • USB biometric scanners.
Jan 2007 - Apr 2017

Staff Asic Design Engineer

Ess Technology, Inc.

Irvine, California, United States

  • Front-end decoder of Blu-ray Disc ECC.
  • Architecture of the front-end decoder of HD DVD ECC design.
  • High performance 64/32bit DMA of DVD design.
  • SD and xD flash memory controller.
Oct 2004 - Dec 2006

Principal Asic Design Engineer

Emulex, An Avago Technologies Company

Costa Mesa, California, United States

  • High performance 8-split 128bit 200MHz PCI-X transmitted DMA of FC HBA.
  • High performance 128bit 250MHz LMAU for QDR memory w/ECC of FC HBA.
  • High performance 64bit 200MHz PCI-X received DMA of FiberChannel HostBusAdapter.
Apr 2000 - Apr 2004

Principal Asic Design Engineer

Cmd Technology Inc. (Acquired By Silicon Image Semi.)

Irvine, California, United States

  • Cost down and power saving version of OpenHCI USB HOST chip.
  • USB device target IP.
  • OpenHCI USB HOST controller ASIC and card.
Mar 1996 - Aug 2000

Senior Asic Design Engineer

Crest Microsystems Inc

Cerritos, California, United States

  • Architecture of the CD-ROM red book CIRC encoder/decoder design.
  • Designed CD-ROM disk decoder ASIC chip.
  • PCI/VESA EIDE ASIC and and add-on card.
Nov 1993 - Mar 1996

Senior Asic/Hardware Design Engineer

Morse Technology Inc.

Industry, CA

  • VESA EIDE cache controller FPGA and add-on card.
  • EISA ESDI/IDE cache controller FPGA and add-on card.
Apr 1991 - Nov 1993

Senior Asic/Hardware Design Engineer

King Phoenix Co., Ltd.

Taipei City, Taiwan

  • First PC-AT 1:1 interleave ASIC and storage controller add-on card in Taiwan.
  • PC-XT/AT 2:1 interleave MFM and RLL storage controller add-on card.
  • Team leader of mass storage group.
  • Completed product technology transfer of laptop computer from Micronics USA.
Aug 1987 - Apr 1991
2 education records

Simon Tan education

Bachelor Of Science - Bs, Electrical And Electronics Engineering

St. John'S University, Taiwan

Activities and Societies: 1985 Highest Prize of Computer Hardware Contest held by Ministry of Education of Taiwan for college students.

FAQ

Frequently asked questions about Simon Tan

Quick answers generated from the profile data available on this page.

What is Simon Tan's role at their current company?

Simon Tan is listed as Senior Hardware Design Engineer.

What is Simon Tan's email address?

AeroLeads has found 1 work email signal at @3m.com for Simon Tan.

What is Simon Tan's phone number?

AeroLeads has found 2 phone signal(s) with area code 626 for Simon Tan.

Where is Simon Tan based?

Simon Tan is based in Hacienda Heights, California, United States.

What companies has Simon Tan worked for?

Simon Tan has worked for Thales Digital Identity & Security, Gemalto (Now Thales Digital Identity & Security), 3M Cogent, Ess Technology, Inc., and Emulex, An Avago Technologies Company.

How can I contact Simon Tan?

You can use AeroLeads to view verified contact signals for Simon Tan, including work email, phone, and LinkedIn data when available.

What schools did Simon Tan attend?

Simon Tan holds Master Of Science - Ms, Computer Science from Pacific States University.

What skills is Simon Tan known for?

Simon Tan is listed with skills including Debugging, Embedded Systems, Integration, Semiconductors, and Soc.

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