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Santosh Raghavan Email & Phone Number

Power Architecture and Silicon Technology Engineer at Groq
Location: Santa Clara, California, United States 7 work roles 4 schools
1 work email found @groq.com LinkedIn matched
✓ Verified May 2026 4 data sources Profile completeness 100%

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Current company
Role
Power Architecture and Silicon Technology Engineer
Location
Santa Clara, California, United States
Company size

Who is Santosh Raghavan? Overview

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Santosh Raghavan is listed as Power Architecture and Silicon Technology Engineer at Groq, a company with 522 employees, based in Santa Clara, California, United States. AeroLeads shows a work email signal at groq.com and a matched LinkedIn profile for Santosh Raghavan.

Santosh Raghavan previously worked as Power Architecture & Silicon Technology Engineer at Groq and Hardware Modeling Engineer at Intel Corporation. Santosh Raghavan holds Doctor Of Philosophy (Phd), Materials Engineering from Uc Santa Barbara.

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{first_initial}{last}@groq.com
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Profile bio

About Santosh Raghavan

Hardware engineer with expertise in:- Chip and module-level PPA assessment- SoC power modeling (Joules, PTPX) - Chip/Package/Board-level power delivery network (PDN) simulations- Standard cell library and design optimization (SPICE, Liberate/Primelib)- Physical design, STA and back-end flow CAD implementation (RTL to GDS signoff)8+ years experience and specialization in digital/analog design and implementation, device physics, SPICE compact-modeling, TCAD modeling, reliability and behavioral modeling, machine learning and deep learning / neural network based predictive-models.

Listed skills include Materials Science, Matlab, Data Analysis, Scanning Electron Microscopy, and 58 others.

Current workplace

Santosh Raghavan's current company

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Groq
Groq
Power Architecture and Silicon Technology Engineer
Santa Clara, CA, US
Website
Employees
522
AeroLeads page
7 roles

Santosh Raghavan work experience

A career timeline built from the work history available for this profile.

Power Architecture And Silicon Technology Engineer

Santa Clara, CA, US

Power Architecture & Silicon Technology Engineer

Current

Mountain View, California, US

Developing the world's fastest AI inference solution in the market!Responsible for:- Power Optimization & Power Modeling of Silicon & Systems for AI/ML Workloads (like LLMs)- ASIC Low-Power Design Optimization & Technology-specific Design Methodology- Power v/s Perf Architecture Trade-off for Silicon & Systems Design- Power Delivery Network design & Power.

Jul 2021 - Present

Hardware Modeling Engineer

Santa Clara, California, US

- Technology Benchmarking and Big data analysis, Signal processing, Process improvement, and Technology pathfinding within Non-volatile Memory Development performance-cost constraints- Scripting and automating design flows (using Python and C++) to accelerate process and product development- Hardware Design Enablement and PDK/SPICE model development.

Nov 2019 - Jul 2021

Senior Staff Device Engineer (Rf/Logic)

Carlsbad, California, US

  • Advanced RF semiconductor device design, characterization, modeling for advanced CMOS, BiCMOS, HBTs, III-V and GaN HEMT devices for analog/mixed-signal/power applications
  • Development and design enablement of advanced 5nm CMOS technology, comparison with previous technologies and providing improved PDK and design environment
  • Developed full spectrum of BSIM/BSIMCMG based compact SPICE models for 14nm/16nm technology PDK currently used for designing PAM4 DSP high-speed optical interconnect and 5G wireless access transceiver products
  • Characterized advanced node CMOS FinFET devices covering I-V, C-V, high frequency S-parameters, flicker/thermal noise, and linearity/Intermodulation-distortion (IP3) measurements
  • Developed SPICE models for precision high-R resistors, ESD diodes, BJTs and capacitors
  • Designed custom test-chip for 14nm FinFET device technology for thermal and flicker noise measurements, parasitic capacitance measurement of precision high-R resistors, capacitors and diodes
Jul 2017 - Nov 2019

Graduate Student Researcher

Santa Barbara, CA, US

  • PhD graduate student at UCSB, Materials Engineering.Advisor: Prof. Susanne StemmerDomain: Growth and Characterization of Oxide Semiconductor Thin Films For Advanced ElectronicsAuthored 17 journal publications (5 first.
  • Lead and managed research projects, fabricated micro- and nano-scale oxide semiconductor devices in cleanrooms
  • Characterized materials quality using numerous materials analysis tools, designed materials for device applications
  • Maintained operation and troubleshooting of high-end mechanical and electronic equipment for group laboratoriesSelected Projects:1. “Molecular Beam Epitaxy of High Mobility Perovskite Oxides”
  • Developed a novel growth technique for high quality BaSnO3 semiconductor thin films. Demonstrated highest reported room temperature mobilities that are of interest for higher efficiency RF and power devices2. “Probing.
  • Established fundamental understanding of interplay between ferroelectricity and metallicity at reduced dimensions, with implications for all ferroelectric materials
Sep 2011 - Jun 2017

Research Assistant

Lausanne, Vaud, CH

  • Masters graduate student at EPFL, Materials Engineering.Advisor: Prof. Nava SetterDomain: Ferroelectric Materials for Advanced ApplicationsAuthored 2 first author journal publicationsPresented at 1 conferences and gave.
  • Investigated the effect of ferroelectricity on graphene and fabricated high-speed non-volatile FET-based memories with long-term retention properties2. “A DFT Study of SrTiO3 – Water Interfaces”
  • SrTiO3 – Water interface was modelled to find wet electron states facilitating electron transfer at the interface
  • These results explain the phenomenon which will help in fabricating efficient SrTiO3 photo-catalytic electrodes for water splitting. 3. “Fabrication and Evaluation of Organic Field-Effect Transistors (OFET)”
  • Fabricated OFETs based on two materials, Pentacene and P3HT (semiconducting polymer) at EPFL and CSEM (Swiss National Research Institute, Basel)
  • Achieved results helped in obtaining high-performance and low-cost OFETs, suitable for applications such as TFT (thin film displays), electronic readers and RFID chips
Sep 2010 - Sep 2011

Summer Intern

Navi Mumbai, Maharashtra, IN

  • "Reliability Analysis of Steam Reformer Tubes in Hydrogen Plant"
  • Developed a new Remnant Lifetime Assessment method for RIL plant’s reformer tubes, improving assessment of creep degradation and allowing better scheduling of plant shut-downs and reduced equipment down-time
May 2008 - Jul 2008
Team & coworkers

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4 education records

Santosh Raghavan education

Doctor Of Philosophy (Phd), Materials Engineering

Uc Santa Barbara

Course, Machine Learning, Deep Learning

Fastai

Master Of Science, Materials Science

Epfl

Bachelor Of Technology (B.Tech.), Materials Science

Indian Institute Of Technology, Madras
FAQ

Frequently asked questions about Santosh Raghavan

Quick answers generated from the profile data available on this page.

What company does Santosh Raghavan work for?

Santosh Raghavan works for Groq.

What is Santosh Raghavan's role at Groq?

Santosh Raghavan is listed as Power Architecture and Silicon Technology Engineer at Groq.

What is Santosh Raghavan's email address?

AeroLeads has found 1 work email signal at @groq.com for Santosh Raghavan at Groq.

Where is Santosh Raghavan based?

Santosh Raghavan is based in Santa Clara, California, United States while working with Groq.

What companies has Santosh Raghavan worked for?

Santosh Raghavan has worked for Groq, Intel Corporation, Maxlinear, Uc Santa Barbara, and Epfl (École Polytechnique Fédérale De Lausanne).

Who are Santosh Raghavan's colleagues at Groq?

Santosh Raghavan's colleagues at Groq include Antoni Arndt, Emile Cares, Callaghan Wilmott, Aaryahi Vaidya, and Dean Akamine.

How can I contact Santosh Raghavan?

You can use AeroLeads to view verified contact signals for Santosh Raghavan at Groq, including work email, phone, and LinkedIn data when available.

What schools did Santosh Raghavan attend?

Santosh Raghavan holds Doctor Of Philosophy (Phd), Materials Engineering from Uc Santa Barbara.

What skills is Santosh Raghavan known for?

Santosh Raghavan is listed with skills including Materials Science, Matlab, Data Analysis, Scanning Electron Microscopy, Nanotechnology, C, C++, and Semiconductors.

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