Advising Bicara Therapeutics on all activities carried out in India. This includes consulting on R&D, manufacturing and Operations. Bicara's ongoing clinical trials of BCA101 relies on the R&D and manufacturing support from multiple service providers based in India.

eDhanam is a social enterprise working on financial inclusion and financial literacy for the underprivileged, underserved and aspirer class in India.

Providing strategic oversight and leadership to Biofusion, a wholly owned subsidiary of Biocon Limited, as dedicated research arm working on novel antibodies and cancer research. Key representative of the core executive team to lead India’s strategic charter, Government Relations, Industry Relations and to fuel growth of Research and Development capability.

• Responsible for global ASIC development at Emulex Division of Broadcom designing multiple SOCs at various stages of development in 16nm and 7nm nodes with a world class team.• Responsible for India operations of Emulex Division including firmware, Driver, Applications, Test/Automation and customer support. This team is fully integrated into one-global-team and owns critical pieces for overall success of the Division. • Responsible for managing Emulex’s APAC business as Executive Sponsor for all key customers such as Huawei, Inspur, Sugon, Lenovo, IBM Storage and H3C.• Responsible for worldwide customer support for Emulex.• Key player in building and nurturing long-term strategic partnership with EDA suppliers, IP providers, Contractor suppliers, and other strategic partners to deliver successful products.• Setup a new China development team to support customers in China from grounds-up, setting up the necessary infrastructure, recruiting and training engineers.• Previously responsible for worldwide Innovation team at Emulex executing projects in high performance networking, cloud optimizations, converged solutions and network virtualization. Built the innovation team from scratch that consisted of highly skilled, versatile and self-driven technologists.

• Responsible for ASIC Design Methodology/Flow, Design System infrastructure and IPs being delivered out of Infineon India Centre. Developed the Programming services concept in this team to deliver software services globally that require unique hardware design experience. Grew the team three-folds in less than a year. Filled up gaps created by carve-out of Wireless group of Infineon while maintaining very low attrition.• Also responsible for leading various strategy initiatives at Infineon including overall EDA strategy and University Relationship program in India. Successfully created and executed a project for consolidating and moving work done by consultants in various locations to Bangalore resulting in savings of over $10M for the company.• Prior to this role, led Infineon’s 3G entry phone platform project as Systems Program Manager. Responsible for managing end to end project including chip, hardware, drivers, firmware, application software, protocol test and setting up customer projects based on this platform. Successfully acquired Samsung as 3G entry phone customer. Enhanced process compliance to 97% in internal audit from 52% at the time of taking over the project.

Bangalore, India and Milpitas, CA, USA• Built a team in India from grounds-up to about 80 engineers in very short time using a mix of full-time employees and contractors complementing the team in the US for ASIC verification, firmware and software development, test/QA and application development. • Responsible for setting direction, managing resources across functions, coordinating with various teams in US, scoping and scheduling development work, budget planning, project tracking and customer relationship. • Also responsible for architecting management interface including CLI, GUI and SMIS provider, firmware upgrade, baseband management controller interface, alert infrastructure, SNMP and call home utilities, system management and performance tuning.

Lead for 23 engineers to develop next generation multi-million gate hard disk controller SoC design with embedded processor in .13 micron technology. Responsibilities included requirement gathering, architecture definition, specifying the behavior of next generation chip, schedule development and tracking, resource management and fab interface, understanding industry standards and incorporating new research ideas into the design. Responsible for improving team dynamics between different locations by managing various operational and cultural barriers. Job also included working with team members to develop diversified skills and provided opportunities for growth of the team members.Designed and developed Error Correction Logic for drive-data path and processor memory. Hold 5 patents in this area.