Front-end Computations- Developed pipelined High Level Synthesis (HLS) C++ code for a Pynq board FPGA to receive a custom 4105 sample data packet and perform follow up calculations including integration and island in under 10,000 clock cycles.- Collaborated with 3 team members from the University of Hawaii to replicate and validate their dual FPGA setup, where one simulated a data collecting ASIC sending a custom data packet, and one received the data.- Implemented the AXI-Stream interface in VHDL to forward data packets read by the FPGA to HLS processing and interfaced reads writes from the FPGA BRAM to a text file using Jupyter Notebook Python for debugging.Back-end Data Analysis- Assessed different compression algorithms to use on data from a Gamma-Ray Telescope using C++, reducing the size of the output by up to 75% when compared to a naïve method in some scenarios.- Simulated photons hitting edge detectors with the research group’s software pipeline and fit machine learning models to predict the hit location from the particle distributions using Scikit-learn, averaging 16% error.- Determined what types of inputs caused pipeline inaccuracies using Python and simulated how addressing the inaccuracies can lead to 30% improvements.

- Aided in teaching four different classes.- Advised a small group of around 10 students in solving Physics problems in Physics I and II using active learning methods as a Peer Lead Team Learning Leader. Encouraged collaboration and attended weekly discussions on how to better mentor students.- Helped teach a class with over 150 students for Introduction to Computer Engineering. Held office hours, provided project advice, answered content questions, and debugged student code written in Arduino C and Assembly.- Guided a small group of up to 8 students with course material for Introduction to Electrical Engineering. Guided students through MATLAB projects and taught Linear Algebra as a Peer Study Team Leader.