Thomas Bard Email & Phone Number

Layout designer 1997-2023: Worked on all areas of layout. Learned Drc, LVS, Layer fills, building stdcells, building analog logic such as pumps, dll, sense amp, column decoders, etc. Worked on one of the early embedded processes. I helped implement one of the early auto-routers into the flow. I was the lead layout designer on several Hybrid Memory Cubes. Worked on several projects as the solo layout designer taking the design all the way from stdcell, and custom cell development into a finished test chip. Had the opportunity to build a test chip using FinFET design. Used Synopsys icc and icc2 to build several small designs,Examples of the types of projects I worked on and skills used: Worked on many sets of stdcells over the years. Worked in the array building many piched cells for array interface. Layed out Micron's first large array of tsv's. Lead an embedded dram project for a system on a chip. Built many full custom pumps for multiple power supplies Developed Micron's most recent sram cells and built test chips sram arrays including building and using stdcells and routing up the design, complete with all drc's, lvs, fill. Recently built a test chip with a combination of complex logic, sram logic, and interface logic into a memory die including all of the interface wiring and associated drc/lvs. Combined the use of icc2, custom work and std auto-router as well as hand routing. Characterisation and analytics 1992-1996: Used statistical analysis to look and define fab processes that were statistically out of control. Fab experience 1988 - 1992: Learned the in fab processes of diffusion, wet etch, dry etch, photo lithography, inspect and the scanning electron microscope. Gained learning and appreciation for how a cmos chip is built.