Tim Whisonant Email & Phone Number

Sacramento, Ca, Us

Folsom, California, United States

In this role I was a key developer of Intel's Open Programmable Acceleration Engine (OPAE SDK) , an Open-Source software framework for interacting with FPGA accelerators. As Open-Source developers, we were the first point of contact for the community. We were responsible for triaging and resolving each of the bug reports posted to our GitHub site, for working with the FPGA hardware design team to interactively design and bring up generations of FPGA products, and for designing and implementing each generation of the software in support of new FPGA hardware.The OPAE SDK abstracted the device control mechanism, whether Linux kernel mode drivers, or user space VFIO or UIO, or software device emulation. Customers creating their FPGA-accelerated designs needed only to code their application once to the highest-level OPAE APIs, and the choice of how to interact with each of these control mechanisms was selected at runtime based on the customer's configured environment.The OPAE SDK is rooted in C, but we also provided C++ and Python bindings. We used Git and GitHub for source control, pushing new features and bug fixes to development branches. We had a defined release cycle of once quarterly, and were successful in releasing the project more than 15 times.My favorite accomplishment on this project was implementing a remoting SDK plugin using gRPC and Protobuf. The client-side plugin piped each of the SDK calls into Protobufs and sent them across via gRPC calls. I coded a server-side daemon that listened for and responded to each incoming gRPC request. This was all done in C++ with a CMake build system. I also added REST signatures to each gRPC call using a project called gRPC-gateway. This allowed me to code a Python framework using the requests module to invoke the gRPC's using the HTTP protocol by passing it raw JSON. In the end I was able to use OPAE to program and execute accelerated workloads across various systems in our lab remotely without using SSH.

Folsom, California, United States

In this role I was part of a team responsible for developing the firmware (C) for an embedded ARC600 microcontroller. I owned the core kernel pieces comprised of the thread scheduler and the inter-thread communication APIs: mutex, semaphore, event flags, and critical sections. The microcontroller had a programmable interrupt controller with two priority levels, hardware timers, and the ability to enable and disable interrupts.Luckily for me the ARC compiler toolset provided the means to generate an assembler listing for a given C code block. By writing tiny C snippets and examining the assembler listings, I was able to teach myself quite a bit about the instruction set, enough so that I was able to create a very performant thread scheduler, complete with mutex, semaphore, and event passing. The thread scheduler was preemptive, utilizing the hardware timers to control the time quantum for each thread. Threads could yield the remainder of their time quantum voluntarily or else continue processing until the quantum expired and they were preempted. Once preempted, the scheduler cleared interrupts and performed a full processor context save and restore from the previous thread to the next before re-enabling interrupts. If all of the existing threads were blocked waiting on things, the processor was handed over to an idle thread which was capable of servicing low-priority background work.Upon completion of the thread scheduler, I was honored to receive a Division Recognition Award.