Tom Mealey Email & Phone Number

Washington, Dc, Us

Arlington, Virginia, United States

Lead and provide technical direction for the embedded software and firmware team responsible for the Intake layer of Shift5's technology stack.

Arlington, Virginia, United States

Develop FPGA firmware and embedded software to collect and analyze serial communications bus data.

Greater Boston

- Support FPGA-SoC development projects in wireless communications, radar, computer vision, deep learning, and audio applications.- Provide project-based consulting for FPGA design and embedded software implementation.- Design and implement FPGA-based software-defined radio systems, integrating AXI4 IP with RF transceivers including Xilinx RFSoC, Analog Devices, and Texas Instruments devices.- Facilitate sales of HDL & Embedded C code generation tools by developing custom hardware and software solutions.- Develop content and deliver seminars to help customers become proficient in model-based design for FPGA-SoC.- Build customized embedded Linux systems for Xilinx Zynq and Intel SoC FPGA platforms.

Dayton, Ohio Area

- Led a four-person team in the prototyping and development of digital sensor-processing systems.- Managed a $9,000,000 portfolio consisting of six projects to advance sensing technology.- Proposed research topics and ideas to bring new capabilities to the Air Force.- Developed a low-latency, real-time distributed computing system for radar signal processing.- Createded a novel, reconfigurable FPGA / CPU system architecture for digital radar applications.- Implemented signal processing algorithms in fixed-point HDL, optimized for Xilinx FPGAs.- Wrote software and firmware to automate sensor data collection and post-processing.- Built an application layer protocol for synchronization and control of a distributed system.- Developed multi-core applications optimized for embedded ARM Linux systems.

South Bend, Indiana Area

- Developed software and hardware for a unique high-performance computer architecture.- Implemented a custom microarchitecture in Verilog as a softcore processor on a Xilinx FPGA.- Created a suite of diagnostic tests in Verilog and C to verify simulation and run-time behavior.- Wrote an assembler for the custom instruction set architecture in Python to avoid hand-coding.- Identified and fixed bugs in third-party framework to avoid waiting for the vendor's solution.

Bachelor Of Science (B.S.), Computer Engineering

Master Of Science (M.S.), Electrical Engineering

Thesis topic: "Accelerating Inference in Long Short-Term Memory Networks with FPGAs" - Researched state-of-the-art methods in sequence.