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● Coding Skills:_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Universal Verification Methodology (UVM)System VerilogSystem Verilog AssertionsVerilogAdvance VerilogPerl Scripting ● Projects:_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 1. Router 1x3 (RTL Design and Verification)2. AHB2APB IP Core Verification● Protocols:_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ AMBA (AHB,APB)● EDA Tools :_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _Model Sim : Simulation.VC Spyglass : Linting [RTL].VCS Verification : Compilation ,Simulation.Questa Sim : Code Coverage.DC compiler ,Quartus prime : Synthesis [RTL]● Knowledge On:_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _Digital ElectronicsConstraint SolvingFunctional CoverageCode CoverageAssertions