Vinita Jain Email & Phone Number

California, United States

Santa Clara, California, Us

 Led product marketing and product management for of the Intel connectivity product, Thunderbolt. Thunderbolt has 90% attach to laptops and represents a billion dollars revenue. Developed, launched, and managed the product lifecycle of new product line targeting desktop gamers and creators segments. Defined product and secured design wins while building the brand and driving demand. Increased end user familiarity by 2x.

Santa Clara, California, Us

 Responsible for the product marketing, product design, and go-to-market strategy for Adaptix Software Technologies for CPU and GPU products and platforms.  Drive product strategy, definition and collaboration with business development, sales, finance and engineering to develop and launch new programs. Develop OEM design win messaging, Go-to-market strategy and maintain product life-cycle.

Santa Clara, California, Us

 Performed segment analyses, pricing strategy, deal structures, supply demand forecasting, go-to-market and customer engagement plans for discrete graphics and GPU accelerators.  Developed business operations framework to support Intel’s Discrete Graphics Segment spanning Cloud, HPC, Media/Graphics, AI/Inference in Data Center; Gaming and Graphics in Client. Engaged with Intel Sales, Marketing, Business Management Group teams, and Core Computing, Data Center and Global Supply Business Units to set up the business intelligence to develop deep market understanding of TAM, SAM, SOM, industry technology roadmap, trends, market drivers, supply/value chains, and competitive dynamics.

Santa Clara, California, Us

 Drove performance improvement on Intel technology-based ARM Core while meeting leakage and area targets through a systematic application of tool and flow methodologies and tactically handling the technical challenges. Managed Engineers across matrix organizations, growing the group’s portfolio to 3X, analyzing advanced SoC designs for Graphics, Server and ARM IPs for multiple generations of process technology. Enabled successful launch of a lead client product by demonstrating above expected area scaling. Beat performance and power targets showing best achievable design optimization options for Graphics IP.  Hired and mentored new team members growing the team to double its size in less than a year.

Santa Clara, California, Us

Lead technical innovations in the field of physical design, process and design optimization. Led cross-company teams' collaboration on FPGA ASIC design optimization to enable lower power, at iso-performance and lower area on the next generation of technology for Intel’s leading FPGA product. Managed a team of engineers to define Intel’s new process derivative that outperforms competition performance and power by 1 entire generation of semiconductor technology. Strategizing, connecting with SME, and mentoring team members in technical and career growth aspects.

Santa Clara, California, Us

 Analyze advanced SoC circuit designs to increase chip density and save manufacturing cost. Recognition: Highest Divisional Recognition Award by Logic & Technology Development group, Jul-2013. Led program to improve design turnaround from 2 quarters to 2 weeks on complex density efforts. Recognition: Leadership Excellence Award for Velocity by Technology Manufacturing Group, Apr-2012. Led the team of 9 during past 2 years when manager is away. In 2013, provided consultation services and delivered results to 3 different design teams, and initiated consultation engagement with the 4th team. In 2012, accepted an entirely new request and delivered results in less than a week’s time, while consulting 2 other design teams at the same time. Also mentored 3 new team members. Recognition: Promoted to next grade with Exceeds Expectations rating for 2012 performance, Apr-2013.

Bangalore, Karnataka, In

Transforming finance for the digital-first world

 Performed opportunity validation, new market creation, sizing and target segmentation, product specification, prototyping, and quantified the value proposition for Swiftday platform for industry-academia collaboration. Developed product plan and managed full-cycle of 15 pilot run collaborations with the three different Universities in India.

Austin, Tx, Us

M.S. in Circuit Design track at ECE, UT Austin.Teaching Assistant (stipend plus tuition waiver) – Taught 160 students in the Digital Logic Design Lab.

Armonk, New York, Ny, Us

Worked with IBM Bangalore in Circuit Design at schematic and layout levelLed India team’s onsite collaboration with IBM Burlington for I/O library development in 65nm technology for use in flagship IBM Power PC processor designs, Mar-Jun, 2007Represented India team onsite at IBM Fishkill in design of test structures in 45nm technology, Apr-Nov, 2006

Master Of Business Administration - Mba, Major In Marketing & Operations And In Organizational Effectiveness

Ms, Electrical And Computer Engineering

B. Tech, Electronics And Communication Engineering

Education record

Education record

Education record

Leading Managers