Lead Engineer - Pdk And Ams Methodolody
CurrentPcell development, Analog design flow automation,design migration platform development,PDK QA/ enablement, layout automation utility development.
Feb 2024 - Present
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Vishesh Jain Email & Phone Number
PDK/CAD and AMS Methodology @ Cadence || Ex Western Digital
at
Cadence Design Systems
LinkedIn matched
✓ Verified Jun 2026
3 data sources
Profile completeness 86%
Current company
Role
PDK/CAD and AMS Methodology @ Cadence || Ex Western Digital
Location
Bengaluru, Karnataka, India
Company size
Who is Vishesh Jain? Overview
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Quick answer
Vishesh Jain is listed as PDK/CAD and AMS Methodology @ Cadence || Ex Western Digital at Cadence Design Systems, a company with 10 employees, based in Bengaluru, Karnataka, India. AeroLeads shows a matched LinkedIn profile for Vishesh Jain.
Vishesh Jain previously worked as Lead Engineer - PDK and AMS Methodolody at Cadence Design Systems and Senior Engineer at Western Digital. Vishesh Jain holds Master Of Technology - Mtech, Vlsi Design And Embedded Systems, 7.5 Cgpa from Delhi Technological University (Formerly Dce).
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Email format at Cadence Design Systems
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Cadence Design Systems
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Profile bio
About Vishesh Jain
As a professional, I am working as Analog Design and Automation EngineerI have a passion for teaching and love helping students to align their career in the semiconductor industry
Current workplace
Vishesh Jain's current company
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Cadence Design Systems
4 roles
Vishesh Jain work experience
A career timeline built from the work history available for this profile.
Senior Engineer
- ASIC Development Engineering-Mixed Signal IP Design and Automation
- PDKQA Methodology Development Framework for multiple PDKs
- Design Porting Methodology Development and Automation for Advance Nodes (7nm, 5nm)
- Standard Cells QA framework and Solving Challenges related to CDF and Netlisting.
- In In-house performance analysis methodology development and dashboard of the Standard cells library in terms of Power and Delay across multiple flavours.
- Timing critical liberty generation methodology for AMS block.
Aug 2020 - Feb 2024
Intern
CAD Engineering Creating Test Automation environment and CI- CD development using jenkinsCreated a Automated Reporting platform for Sanity Test of IP Verification to ensure the performance and continuous monitoring of environment and reduce manual running of test's reporting, reducing design bandwidth.
Jan 2020 - Jul 2020
Graduate Research And Teaching Assistant
Course work in:Digital Design,Digital CMOS VLSI Design,Low power VLSI design,DSP, Embedded Systems, Physical Design,STA concepts,Virtuoso labs, Verilog.Lab Teaching as an Teaching associate:VLSI Design Digital DesignSignals and SystemsAnalog Electronics It includes conducting Lab session, Design lab experiments, project assignments.
Aug 2018 - Jul 2020
Team & coworkers
Colleagues at Cadence Design Systems
Other employees you can reach at cadence.se. View company contacts for 10 employees →
LC
Leo Chen
Colleague at Cadence Design SystemsTaiwan, Taiwan, Province Of China
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YL
Yen-Liang Liu
Colleague at Cadence Design SystemsTaipei, Taipei City, Taiwan, Taiwan, Province Of China
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AK
Atul Kumar Jha
Colleague at Cadence Design SystemsGhaziabad, Uttar Pradesh, India, India
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AW
Antony W
Colleague at Cadence Design SystemsShanghai, China, China
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FK
Filzer Kummudiyil
Colleague at Cadence Design SystemsBengaluru, Karnataka, India, India
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BH
Bill Huffman
Colleague at Cadence Design SystemsSan Francisco Bay Area, United States
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SB
Samrudh Bangalore
Colleague at Cadence Design SystemsHamilton, Ontario, Canada, Canada
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NH
Narayan Hazarika
Colleague at Cadence Design SystemsMangaldai, Assam, India, India
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RS
Rahul Shah
Colleague at Cadence Design SystemsAhmedabad, Gujarat, India, India
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XZ
Xiao Zhang
Colleague at Cadence Design SystemsBeijing, China, China
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Leo Chen
Colleague at Cadence Design SystemsTaiwan, Taiwan, Province Of China
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YL
Yen-Liang Liu
Colleague at Cadence Design SystemsTaipei, Taipei City, Taiwan, Taiwan, Province Of China
View →
AK
Atul Kumar Jha
Colleague at Cadence Design SystemsGhaziabad, Uttar Pradesh, India, India
View →
AW
Antony W
Colleague at Cadence Design SystemsShanghai, China, China
View →
FK
Filzer Kummudiyil
Colleague at Cadence Design SystemsBengaluru, Karnataka, India, India
View →
BH
Bill Huffman
Colleague at Cadence Design SystemsSan Francisco Bay Area, United States
View →
SB
Samrudh Bangalore
Colleague at Cadence Design SystemsHamilton, Ontario, Canada, Canada
View →
NH
Narayan Hazarika
Colleague at Cadence Design SystemsMangaldai, Assam, India, India
View →
RS
Rahul Shah
Colleague at Cadence Design SystemsAhmedabad, Gujarat, India, India
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XZ
Xiao Zhang
Colleague at Cadence Design SystemsBeijing, China, China
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4 education records
Vishesh Jain education
Master Of Technology - Mtech, Vlsi Design And Embedded Systems, 7.5 Cgpa
Electronics And Communication Engineering, Electronics And Communication, 7.8 Cgpa
Scholar Of Isc, Mathematics And Computer Science, 96% (School Rank 2Nd And Also In Top 1% Of Icse Examination In Year 2013)
St Jude'S School
Master Of Technology - Mtech, Vlsi
FAQ
Frequently asked questions about Vishesh Jain
Quick answers generated from the profile data available on this page.
What company does Vishesh Jain work for?
Vishesh Jain works for Cadence Design Systems.
What is Vishesh Jain's role at Cadence Design Systems?
Vishesh Jain is listed as PDK/CAD and AMS Methodology @ Cadence || Ex Western Digital at Cadence Design Systems.
Where is Vishesh Jain based?
Vishesh Jain is based in Bengaluru, Karnataka, India while working with Cadence Design Systems.
What companies has Vishesh Jain worked for?
Vishesh Jain has worked for Cadence Design Systems, Western Digital, and Delhi Technological University (Formerly Dce).
Who are Vishesh Jain's colleagues at Cadence Design Systems?
Vishesh Jain's colleagues at Cadence Design Systems include Leo Chen, Yen-Liang Liu, Atul Kumar Jha, Antony W, and Filzer Kummudiyil.
How can I contact Vishesh Jain?
You can use AeroLeads to view verified contact signals for Vishesh Jain at Cadence Design Systems, including work email, phone, and LinkedIn data when available.
What schools did Vishesh Jain attend?
Vishesh Jain holds Master Of Technology - Mtech, Vlsi Design And Embedded Systems, 7.5 Cgpa from Delhi Technological University (Formerly Dce).
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