Wendemagegnehu B. Email and Phone Number
Wendemagegnehu B. work email
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Wendemagegnehu B. personal email
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Skill and Interest: ☞ Power-supply noise and delay/jitter analysis of high-performance FPGA, CPU, GPU, memory and AI ASIC's including SoC's for AR/VR/MR applications☞ High-speed link modeling and simulation techniques to support the design and analysis of circuits and systems for serial and parallel interface in I/O and memory systems. ☞ Machine learning techniques (including FPGA implementations) for design and analysis of electronic systems☞ Research in voltage noise and jitter analysis in digital cores, high-speed wireline interfaces, memory systems and electronic design/analysis automation☞ Electrical Signaling—Modulation, equalization, and channel analysis toward 224 Gb/s
Meta
View- Website:
- metadownhole.com
- Employees:
- 136862
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Signal And Power Integrity Lead For Soc, Package, System Design (Analog And Mixed Signal Architect)MetaCalifornia, United States
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Analog And Mixed Signal ArchitectMeta Oct 2021 - PresentMenlo Park, Ca, Us
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Distinguished Lecturer - 2Nd TermEps - Ieee Electronics Packaging Society Jul 2020 - PresentPiscataway, New Jersey, Us☞ Design and Analysis of Chiplet Interfaces for Heterogenous Systems;☞ Applications of Machine Learning to Signal and Power Integrity Problems; -
Distinguished LecturerIeee Emc Society Jan 2021 - Dec 2022Piscataway, New Jersey, Us☞ Design and SI/PI Analysis of High-Performance Memory Systems;☞ Package Requirement for High-Speed Links: 112 Gbps and Beyond; -
Analog & Mixed Signal ArchitectFacebook Aug 2020 - Oct 2021Responsible for the signal and power integrity of high performance and area/power efficient custom designs in advanced CMOS process nodes for our next generation, leading-edge AR/VR chips to meet, in addition to the power/performance, the System Integration Complexity☞ Define/Negotiate voltage budgets for SoC, PMIC, package, and PCB☞ Optimize system PDN and make design trade-off of all rails from PMIC to SoC☞ Provide PMIC and SoC package specification and board design guidelines -
Analog And Mixed Signal Architect At Meta PlatformsFacebook Aug 2020 - Oct 2021
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InstructorUniversity Of California At Santa Cruz 2010 - 2021Santa Clara, California, Us☞ Comprehensive Signal and Power Integrity for High-Speed Digital Systems; ☞ Design and Analysis of High-Performance Memory Systems;☞ Advanced Signaling: Jitter and Noise Analysis ;☞ Introduction to FPGA Application in Autonomous Driving Systems; ☞ Computer Techniques for Circuit Analysis and Design. -
Principal Engineer / Manager, Programmable Hardware EngineeringIntel Corporation Aug 2017 - Jul 2020Santa Clara, California, Us☞ On-chip power supply noise and timing analysis of digital and mixed-signal blocks☞ On-chip and off-chip noise and jitter analysis of complete high-speed interfaces☞ Flow development for modeling transmitter, receiver, clocking blocks and system PDN -
Technical DirectorRambus Inc. 2001 - Aug 2017San Jose, Ca, UsLead engineer in high-speed link architect modeling and simulation to optimize performance and power efficiency with robust signal and power integrity at component and system levels☞ On-chip and off-chip signal and power integrity analysis of parallel and serial high-speed interface design and analysis with low-BER requirements (<10e-16).☞ Prediction and validation of voltage and timing margins of multi-protocol SerDes (up to 56 Gbps) and memory interfaces (from 3.2 to 16 Gbps) with process and environmental variations.☞ Provide measurement capabilities of links using scattering parameters (> 60 GHz) and TDR and TDT (< 9 ps edge rate) to characterize connectors, cables, boards and packages.☞ Development and validation of IBIS-AMI models of multi-protocol (multi-rate) SerDes transceivers on various commercial (and in-house developed MATLAB and Python) tools. -
R&D Software EngineerHp 1997 - 2001Palo Alto, Ca, UsR&D Software Design Engineer (+ Agilent Technologies): Worked on circuit and system simulation software design and implemented various algorithms for analog/RF circuits and systems analyses as a member of the team that architected the Advanced Design System (ADS) simulation tools. -
Senior Associate EngineerIbm May 1988 - Sep 1994Armonk, New York, Ny, UsPosition involved physical design, layout, experimental characterization, electrical analysis and modeling of multichip module (MCM) packages (with interposers and thin films). -
Research InternFord Motor Company May 1994 - Aug 1994Dearborn, Michigan, UsPerformed research in Sneak Circuit Analysis for Electro-Mechanical Systems
Wendemagegnehu B. Skills
Wendemagegnehu B. Education Details
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Columbia UniversityElectrical Engineering -
Columbia UniversityElectrical Engineering
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University Of Illinois Urbana-ChampaignElectrical And Computer Engineering
Frequently Asked Questions about Wendemagegnehu B.
What company does Wendemagegnehu B. work for?
Wendemagegnehu B. works for Meta
What is Wendemagegnehu B.'s role at the current company?
Wendemagegnehu B.'s current role is Signal and Power Integrity Lead for SoC, Package, System Design (Analog and Mixed Signal Architect).
What is Wendemagegnehu B.'s email address?
Wendemagegnehu B.'s email address is ws****@****tel.com
What is Wendemagegnehu B.'s direct phone number?
Wendemagegnehu B.'s direct phone number is +4413552*****
What schools did Wendemagegnehu B. attend?
Wendemagegnehu B. attended Columbia University, Columbia University, University Of Illinois Urbana-Champaign.
What skills is Wendemagegnehu B. known for?
Wendemagegnehu B. has skills like Semiconductors, Asic, Ic, Simulations, Mixed Signal, Fpga, Verilog, Signal Integrity, Soc, Signal Processing, Vhdl, Matlab.
Who are Wendemagegnehu B.'s colleagues?
Wendemagegnehu B.'s colleagues are Kerol Guaqueta, Quenton Narcisse, Rawan Naous, Gabriela Mc Darby Adler, Denis O., Marissa Glowacz, Ex Ne.
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