Engineer in the Digital Hardware Design Department focusing onhigh-speed mixed signal circuit card assemblies (CCA)● Technical Lead for airborne rated CCAs containing multipleapplication specific integrated circuits (ASIC) and FieldProgrammable Gate Arrays (FPGA). Designed hardwarearchitecture to ensure requirements were met and lead highspeed signal integrity (SI) and power integrity (PI)end-to-end simulation efforts.● Modeled and measured ASIC power distribution networks(PDNs) to create an optimized design that minimized voltageripple on the die.● High Speed simulation of DDR4, PCIe Gen4, PAM4 and NRZSERDES. Provided routing feedback, design guidelines andfinal compliance rating.● Performed measurement and correlation of S-parametermodels using Vector Network Analyzers for PDNs● Designed high speed space rated cables for cubesat project● High speed flex cable design and manufacturing● Strong Mentor/Mentoring connections, and run a yearlysummer intern project on the basics of signal and powerintegrityPublished the following articles while working at Northrop Grumman: McCaffrey, W. et. al (2024, January 30). Who Put that Inductor In My Capacitor?Signal Integrity Journal. 6 (1), 42-48.McCaffrey, W. (2024, January 31). Unmasking Voltage Regulator Instability, WhatVendor Reference Designs Aren’t Telling You. DesignCon2024 Chiphead TheaterMcCaffrey, W. (2022, November 14). Small Signal Models, Small Signal Problems.Signal Integrity Journal.