Ajay Kumar Email & Phone Number

Bangalore Urban, Karnataka, India

 Design and deliver quality layouts to front end designers. Final point of escalation for any technical issues for multiple compiler projects. Performance Management through feedbacks and Annual Appraisals. Identifying, creating & Implementing opportunities for Design Automations & Process Improvements. Managing skillset of the team for future needs through trainings. Thoroughly involved in all aspects of Project and Technical deliverables.

Bangalore

 Developed scratch level layouts for various Bitcell-arrays and created final packages foundry approvals. Drawn scratch level layouts for various Colm Decoder blocks for different Muxes, that includes development of Muxing blocks, sense amplifier blocks (using half-cell matching techniques), Write driver and IO blocks. Drawn scratch level layouts for Wordline Decoder blocks for different Muxes, that includes development of WL Driver blocks with robust OTC Power Planning, interface with bitcell and Control blocks, DBL turn around programing. Drawn scratch level layouts for Control blocks for different Muxes, that includes pre-decoding, CLKGEN, EMA, Xselect/Yselect driver blocks, LREN logic, address latches, QNAP logic, and Bitline pre-charge blocks. Drawn scratch level layouts for various memory features as BOLT-ON cells to interface with Colm/WL/Control blocks.

Bangalore

Responsible for developing and delivering SRAM/ROM/RF memories from scratch with finest quality. Involved in multiple intermediate stage deliveries like Alpha/Beta/EAC releases to the customer.I was responsible for TSMCN7FF SRAM Single Port and RF Dual Port compilers Layout design & delivery from scratch.

Bangalore

• Mastered in following areas:o Floor plan and placement for various SRAM, RF, ROM layouts.o Cells level and instance level BE verification. o Chip level BE verification using router tools.o Core array package as per customer requirement.o EM_IR flow set up and excellent debugging skills.

Karnataka, India

 Worked on various single-port and dual-port memory architectures and their layout designs, Back- End verification of multiple memory instances (w.i LVS/DRC/DFM/LEF/EM_IR/ERC and additional internal sanity checks to ensure quality of a product.)o Drawn sub blocks in SRAM memories and verification of instances.o Experienced in Register files Architecture and layout Design. Experience in ROM Architecture and layout Designs.  Experienced in cache memories development (L1,L2). Developed skills on virtuoso layout/schematic editor for the layout of digital circuits and analog circuits of sense amplifier.  Worked on sense amplifier layout design and mastered in providing the high quality for current mirror circuit. Great experience on core_array development for customer bitcell array and in_house bitcell array. Well Experienced in em_ir flow set up and having good understanding on requirement of customer from DRM. Worked on lower node like 20nm soc and 14nm finfet technologies. Having an experience from 110nm to 14nm technologies. Experienced in caliber SOC-encounter & Synopsys ICC router. Exposed to leafcell extraction using xact-3D. Hands on experience in skill and other automation flows. Having very good understanding with automation flow and can be adopted to any new flow quickly.

Karnataka, India

• Gained hands on experience in layout design of SRAM, RF, ROM memories for multiple projects.• Good knowledge on high speed multi-port SRAM layout designs, layout design of high density memories and Register files (1r1w) and ROM architecture. Good knowledge on multi bank memory architecture, pipe line, write mask, power gating, redundancy and tracking of bit cells.• Gained in depth knowledge on various stages of SRAM layout designs, starting from Architecture floor planning, placement, shielding, taking care of critical paths and integration of all sub blocks. Developed skills in IO, Control, Decoders and bit cell Arrays.• Gained the knowledge from scratch level drawing to post silicon validation.

Karnataka, India

Responsible in delivering finest trainee engineers in the field of Embedded Systems that includes Hardware development using ARM, PIC, AVR controllers and developing SMT boards. also programming in Assembly level language, C, Embedded C, UNIX and RTOS.Responsible to design and developing real time projects using Embedded firmware..

Bachelor Of Engineering - Be, Electrical, Electronics And Communications Engineering, Distinction

Diploma Of Education, Electrical, Electronics And Communications Engineering, Distention

Sslc, Maths, Sciences