R&D team & project managementbringup & MPdesign-in to desig-win with customeroperation@JointMicro

More than 20 years of experience on ASIC development, Focus on ASIC/IC front end R/D team management for recent 10 years, especially for ASIC digital design, verification, implement for CPU/GPU, AI accelerate engine and CIS and BMS area.RiscV CPU, AI processor, CIS, BMS Market Requirement Analysis for RDDesign Data sheet definationASIC design/verification for FEBE PR/LAYOUT Software developmentBoard level development and whole system integrationBringup, demo set development & production

X86 CPU R&DBuildup verification team, team member training, draft out design verification flow and rules. According to DUT’s characteristics, select verification strategy, lead team member develop verification environment and test bench with scripts and UVM. Develop design verification infrastructure, such as Auto-Reg, Vplan, Auto-Regression etc. manage project execution, co-work with design and architecture team. Push verification input materials review, verification plan creation, push on verification work till related report release.

Security and MCU production.The Verification Dept. involving Frontend verification, FPGA prototyping verification, Hardware Emulator Development, software test and Mixed-signal simulation.

STAFF DV EngineerGPU Productionbuild up block/chip level testbench for designdesign verifiction and regressiondevelop DV related tools and platform, flow for optimization of DV flow