1. Drive foundry process improvements, process changes, retargeting to improve test yield, performance, variation.2. Work with cross functional team to allocate yield improvement opportunity, drive for ATE/SLT/OSAT yield/process improvement.3. Manage product ramp to yield entitlement. Drive margin issues with operations and development teams.4. Management of product development activities which include driving product performance improvement (yield, quality, etc.) and cost reduction 5. Manage the introduction of new products and the ramp to volume manufacturing.6. Manage the engineering activities during new product development including product definition, performance characterization, qualification, and release to production. 7. Lead cross functional teams and maintain schedules on multiple projects while interfacing with other engineering disciplines and various levels of management.8. Work with the Manufacturing, Design, Quality, and Failure Analysis teams in the disposition of product excursions and manage cases through a material review board.9. Train, develop and retain technical competency.

1. Initiate and lead cross-functional teams, develop and drive to meet project deadlines, and solve difficult technical problems with creative thinking.2. Developing and maintaining wafer level functional test strategies and programs.3. Developing innovative solutions for production test flows, interface hardware, and test equipment. 4. Performing redundancy analysis schemes, optimizing device yields, and partnering with stakeholders to optimize and automate equipment and processes.

1. Plan and coordinate all engineering activities to ensure department goals in terms of quality, yield ,cost, productivity, cycle time delivery 2. Develop and execute human resource development plan to train and motivate subordinates3. Establish continous improvement plan for material usage,cost saving or engineering projects4. Initiate and spearhead improvements on OEE,product quality, productivity , yield, work procedures or engineering projects5. Establish and execute production system and process steps tp achieve zero defect standard

1. Sustaining development and test ownership, oversee test flow and program for products.2. Advantest T2000 C++, verigy 93k, LTX credence sapphire java test program development and debug to meet product milestone.3. Responsible for enhancing and meeting cost, productivity,quality goals and tactical plans to support product roadmap.4. Customer corrective actions.

1. Design ATE test system, test solution and test program according customer （samsung, Micron, Elpida, Hynix, Kingston etc）requirements and JEDEC standard.（write/create test program on Advantest 5585/5588/T5593 DRAM test platform and T2000 SOC test platform）.2. Organize team for product yield improvement, test program optimization, test time reduction, process analysis and evaluation, simplification and improvement ATE test program and flow, so as to support manufacturing in achieving the manufacturing goal.3. Create general DDR2/DDR3 eTT test program based on Qimonda program code, finish debug and buyoff on samsung, Micron, Elpida, Hynix, Kingston etc DRAM products .4. Create DDR3 DRAM test program, test plan and test flow for AMD customer with Micron wafer, provide testing solution and create new test program Advantest T5585/5593 platform.5. Leading project of new product SQ qualification, complete DDR2/DDR3 DCTC characterization according JEDEC standard and provide DCTC results and samples to Intel for Intel platform validation, organize and transfer new product according qualification plan. 6. Solving all process, test, and quality related issues, sponsor the engineering evaluations/experiments that directly address quality, reliability, and yield issues, hot case and problem solving, find root cause and provide solution, non-conforming product analysis and disposition.7. Organize and support an effective, smooth communication, coordination within and with other department, Co-work with the design center, FE, BE and BD for new products/new processes/new equipments development for volume production.8. Reduce test time from ramp up 644s to 352s after 1year later, improved equipment capacity, furthermore reduced 10% test cost year over year for mature products.

1. First batch engineers of Philips Semiconductors Suzhou, Set up the manufacturing plant with team from the scratch, transfer production/equipment from Philippines/Taiwan to Suzhou, qualified the product/equipment, keep the mass production yield high and cost low. 2. Team leader of RF (Radio Frequency) ATE testing group, leading the team to improve KPI (FPY, RLIP, Hold Rate, Output, Utilization, MTBBF, maintenance uptime, etc.).3. Team leader of baseband audio Mix signal ATE testing group, Find out low cost solution for mix signal chip testing, equipment supplier management, control supplier contract usage, cost saving.4. Shop floor and 5S/TPM management, keep good environment and 5S workshop, engineering staff discipline, productivity program management.5. Develops and implements plans regarding capacity and materials, Clip/Capacity utilization productivity improvement, meet delivery commitments.6. Production reports, yield & dpm report, yield comment and module Inventory status. 7. Provide corrective and preventative action for product & process problems, high fail lot and Scrap/downgrade root cause investigation and define actions,solve the production and equipment issues, ensure the smooth production.8. Finished project of new tester- SPEA C372MXF introduction for Philips in Y2005. (Transferred Agilent 93000 platform to Spea platform), provide mix signal chip testing solution.