Greg S. Email & Phone Number

Denver, Co, Us

Denver, Colorado, United States

Denver, Colorado

Boulder, Co

• RU Program (~$8M - $1.2M hardware, $6.8M labor); Granite Program (~$1.6M - $300k hardware, $1.3M labor); Marble Program (~$1.1M - $400k hardware, $700k labor) o Authored three different proposals, negotiated feature set to meet budget constraints.o Recruited internal talent to staff programs, participated in the interview process of external hires.o Led cross functional engineering team (Software, Hardware, RF, Systems)o Technical interface for all customer interactions.o Product owner - SAFe Agile Development.o Responsible for cost, schedule, and technical implementation of the delivered simulators.• Led Blackbird Program Simulator project, a classified spacecraft design used to demonstrate functionality to potential customers as part of Ball’s RFP process. (~$3M program over 3 phases)o Responsible for strategic planning of simulator functionality, execution of build, and presentation and exhibition to buyers, including present capabilities and future scope. o Successfully acquired RU, Granite, and Marble programs based on this system.

Boulder, Co

• Responsible for the requirements, implementation and delivery of software components of the STC (Power Control Module, Emergency Power Module, and Command/Telemetry Executive) by contractor, Amergint Technologies (~$5M program total, ~$1.2M software, of which I was responsible)o Generated SW portion of Request for Proposal (RFP), Statement of Work (SOW), and Requirements for STC.o Actively managed progress, functionality and delivery of software portion.

Boulder, Co

• Selected by Ground Systems Director to head client interface on P-992 Program Spacecraft.o Worked onsite at customer location to implement structure and educate customer on design mission controls and ground system.• Responsible for design, implementation, and verification of Satellite Systems Simulators including Skyfox (classified), JPSS – 1 (NASA), WorldView – 3 (Digital Globe).o Wrote embedded driver-level code to control multi-function IO, 1553 Bus, and serial devices (RS432). o Implemented and maintained full suite of tests to verify customer requirements.o Created test plans, applied process controls, supported and responded to customer audit reviews. Accomplishments: • Successfully led Blackbird program (~$3M) and instrumental in acquiring three follow-on programs (~$10.7M)• Selected for Ball Aerospace Leadership Series, a succession of trainings to develop leaders who can create high performing groups, establish effective communication, and effect change within the organization.• Attained highest performance ranking all 6 years of annual reviews.• Received 7 special recognition rewards for “Outstanding Performance, Dedication, and Commitment” • Six Sigma Yellow belt training

Fort Collins, Colorado

Component Design Engineer - Scan DFT (Design for Test) (2010-2012)• Responsible for design and verification of Scan logic, a method used in the manufacturing stage of processor production. Scan logic verifies logic connectivity and integrity of the processor’s physical design.• Wrote and maintained an extensive suite of tests to verify scan chains and logic arrays.• Implemented RTL (Register Transfer Layer) features and improvements.• Conducted validation progress and “synch meetings” to unite all affected functional design areas. To this end, I defined and managed both customer and stakeholder needs and incorporated expectations.

Fort Collins, Colorado

Logic Verification Engineer (2007-2010)• Verified and contributed to design for DAF (Digital Activity Factor) Block of Poulson (Itanium®) Chip to maintain power thresholds by throttling back the dispersion queues. This moderated the number of simultaneous instructions allowed based on power consumption.• Owned random code generator (Falcon) which created assembly code instructions which exercised and verified the processor core and system interface.o Triaged failures in RTL, tools and checkers.o Continually enhanced Falcon’s capabilities to support testability of new RTL features.

Dupont, Washington

Technical Team Lead, Server Management Firmware (2006 – 2007)Firmware Development Engineer (2004-2006)• Owned firmware product area on 4-way Xeon® enterprise server, including scope and feature set of firmware deliverables.• Responsible for firmware product area schedule, scope and feature set.• Maintained functional responsibility and performance oversight for daily for teams of up to 7 engineers, managing new feature deliverables and drive defect resolution.• Served as customer interface to Fujitsu-Seimens Corporation Firmware Development Team.o Chaired both official weekly meetings and spot gatherings as needed with FSC engineers to resolve technical issues encountered in firmware development.o Acted as customer consultant to offer insight and recommendations for design decisions.o Resolved and debugged (remotely and on-site) any defects and suggested feature enhancements.• Wrote embedded server management firmware for Intel’s enterprise-class servers. o Developed in C; ARM architecture, and ThreadX RTOS.o Owned build and release of code on bi-weekly schedule.o Implemented Intelligent Platform Management Interface (IPMI) features.o Maintained open communication with BIOS, Hardware, and Validation engineers to maintain coordination amongst functional groups.o Responsible for feature documentation in Firmware External Product Specifications for customer delivery.Accomplishments: • Promoted to Senior Engineer and selected to take on a new role in Fort Collins’ PDC (Processor Design Center).• Successfully launched Server Management Firmware for Intel’s Harwich Enterprise Server both on schedule and with full feature set.• Successfully enabled FSC’s Enterprise Server launch, receiving FSC’s award of acknowledgement.

Dupont, Washington

Firmware Validation Engineer, Server Management Firmware Validation (2002-2004)Firmware Validation Engineer – Intern (Summer, 2001)• Developed and maintained tools and test scripts for firmware validation written in TCL scripting language.• Created test plans from development documentation including IPMI v.1.5, IPMI v.2.0, and Firmware EPS.• Managed the daily schedule and workload of contracted student employee staff, including responsibility for team productivity and deliverables.• Led training sessions (face-to-face and remotely) and authored corresponding training documentation for offshore teams in India and Taiwan.Accomplishments: • One of two summer interns receiving an offer for full time employment out of a class of 12.

Master Of Business Administration (M.B.A.)

Ms, Computer Science

Bs, Computer Engineering