Greg Jahn Email & Phone Number

My experience is primarily focused in the area of computer hardware design and validation, with most recent experience being in the pixel pipeline of graphics hardware. This experience includes designing the validation environment using SystemVerilog and C++, creating testplans and coverage points to ensure that tests are executing what they are intended, debugging failures in waveform systems such as Verdi and VCS, fixing bugs found in the design, and helping to ensure the chip hierarchy is organized and consistent.In addition to this, I have acted as the Hardware Key Contact for my team, ensuring that compute resources are properly allocated, and acting as a first-contact resource for any issues which may arise in their validation efforts. This has resulted in my being one of the validation experts in our team, frequently used a resource for any difficulties in debug that other team members may run into, allowing me to better understand how all the disparate parts of our product fit together.I find the greatest reward from my work is through the process of solving problems, and would like any future career directions to include the ability to fulfill that passion.

Listed skills include Systemverilog, Semiconductors, Validation, Testing, and 10 others.

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  Penn State University

  Computer Engineering