Entry level experience in Analog and mixed signal IC design Professional experience in CMOS circuit designProfessional experience in CMOS circuit analysis Professional experience in VLSI testing Chip lead in PLL2 team at California State University SacramentoProfessional experience in designing latch-up test structures and silicon debugging.Professional experience in FPGA emulation using Altera's Cyclone FPGA kit + Quartus II tool + SOPC builder and Professional experience in digital design using Xilinx ISESpecialties: TOPICS :CMOS circuit analysis CMOS PLL design CMOS analog comparator (Sasken comparator)Digial design & FPGA Emulation TOOLS:Mentor Graphics IC design studio Cadence Virtuoso Cadence Allegro tools OrCad PSpice Eldo HSpice ModelsimMultisimUltiboardSOPC builder (Altera)Quartus II (Altera)Xilinx ISE Synopsys VCS, Design VisionPrimetime PROGRAMMING /SCRIPTING LANGUAGESCC++Perl TCL