As a Senior Technical Director at Rambus, I focus on memory and interconnect pathfinding for the Memory Interface Chips (MIC) product business unit. In this role, I investigate strategic opportunities for next-generation server infrastructure and help to shape the roadmap for Rambus’s system solutions initiatives. I also serve as the point of engagement and collaboration between the Rambus MIC product division and the Rambus Labs research division.As a former Distinguished Engineer and memory technologist at Dell, I led the pathfinding and integration strategy for emerging DRAM memory technologies (DDR, LPDDR, HBM, CXL, etc.) across Dell's enterprise business units. I worked closely with industry leaders to ensure Dell's strategic interests were represented and that requirements were driven into external product designs and industry specifications. I also represented Dell as their lead JEDEC team member for enterprise memory standards strategy and Dell's voting on standardization ballots.With over 20 years of experience in hardware development, I have contributed to the development of many IBM and Dell servers that span the spectrum from high-volume to high-end servers. My work has resulted in over 20 granted patents, and I was recognized with a JEDEC award for my contributions to the DDR5 standard.In addition to my technical expertise, I was also an elected co-chair of the Memory Systems Workgroup for the CXL Consortium for almost two years. In this role, I led discussions and collaborated with industry peers to drive new memory-related features and functions into the CXL standard. I am also the committee chair of the JEDEC Sub-Committee on CXL Logic Support Devices.My passion for driving innovation in the memory technology industry, coupled with my dedication to mentoring and building strong collaborative relationships, has been the key to my success. I am excited to continue to make meaningful impacts and contribute to the growth of the industry and those around me.