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Kiran Manjunatha Email & Phone Number

Senior Staff ASIC Digital Design Engineer at Marvell Technology
Location: Austin, Texas, United States 5 work roles 3 schools
1 work email found @marvell.com 2 phones found area 352 LinkedIn matched
✓ Verified July 2026 4 data sources Profile completeness 100%

Contact Signals · 1 work email · 2 phones

Work email k****@marvell.com
Direct phone (352) ***-****
LinkedIn Profile matched
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Current company
Role
Senior Staff ASIC Digital Design Engineer
Location
Austin, Texas, United States

Who is Kiran Manjunatha? Overview

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Quick answer

Kiran Manjunatha is listed as Senior Staff ASIC Digital Design Engineer at Marvell Technology, based in Austin, Texas, United States. AeroLeads shows a work email signal at marvell.com, phone signal with area code 352, and a matched LinkedIn profile for Kiran Manjunatha.

Kiran Manjunatha previously worked as Staff ASIC Digital Design Engineer at Marvell Semiconductor and SOC Logic Design Engineer at Globalfoundries. Kiran Manjunatha holds Master Of Science (M.Sc.), Electrical And Computer Engineering from University Of Florida.

Company email context

Email format at Marvell Technology

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{first_initial}{last}@marvell.com
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AeroLeads found 1 current-domain work email signal for Kiran Manjunatha. Compare company email patterns before reaching out.

Profile bio

About Kiran Manjunatha

I have close to 5 years experience working as a Logic Design Engineer. I design functional logic, chip level clocks and resets controllers, integrate complex IPs into an effective subsystem. Also implement logic checks including LINT/CDC/RDC, unit level verification, perform synthesis and support timing closure for Marvell's next generation Custom ASICs Business Unit. Languages: Verilog, VHDL, System Verilog, Tcl, C/C++, Python, UVM, Perl. I have vast experience with industry standard software simulation/backed verification tools such as Cadence, NCSim, SimVision, Verdi, XILINX ISE Vivado, Synopsys DC Compiler, LabVIEW, ModelSim, AutoCAD. I have a Masters Degree in Electrical and Computer Engineering from University of Florida with a specialization in VLSI Logic design and Verification. My coursework and projects helped me understand the intricacies of Logic Design, programming RTL in System Verilog HDL language, design verification/methodologies (UVM), waveform debugging, bus protocols, CDC techniques, Perl scripting and ASIC/SoC Design Flow in general. During my MS degree, I gained industry experience and worked as a Graduate ASIC Design & Verification intern at Rockwell Automation. I designed and functionally verified an Ethernet IP MDIO Interface controller to connect between the MACs and PHYs. Prior to MS, I have two years experience at Yokogawa Electric. I was integral in full life cycle design, development, prototyping, testing of designs related to Distributed Control Systems (DCS) processors & hardware.

Listed skills include C, Verilog, Vhdl, System Verilog, and 45 others.

Current workplace

Kiran Manjunatha's current company

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Marvell Technology
Marvell Technology
Senior Staff ASIC Digital Design Engineer
Austin, TX, US
Website
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5 roles

Kiran Manjunatha work experience

A career timeline built from the work history available for this profile.

Soc Logic Design Engineer

Malta, Ny, Us

Designing functional logic and integrating complex IP's and ARM based SOCs using industry standard processes and tools.

Jan 2018 - Nov 2019

Graduate Asic Design & Verification Intern

Milwaukee, Wi, Us

My work here involved understanding the intricacies of Logic Design, programming RTL modules in System Verilog HDL language, design verification techniques and methodologies, debugging, test bench development and ASIC Design Flow in general. Gained practical skills in designing and verifying modules right from specifications at the RTL level. Formulated test benches and devised test cases to test the functionality of the design. I was quick in learning new concepts and skillfully applied my theoretical concepts.Gained good knowledge on design and verification techniques like coverages & assertions, constrained random verification, UVM test bench development, on-chip interconnect specifications like AMBA, AXI, APB and other bus protocols used for connection and management of functional blocks on a chip. Earned outstanding feedback from managers and engineers on performance, proficiency, team work and quality.Designed and verified an Ethernet MDIO Interface controller based on the specification (Clause 22 of IEEE 802.3). Created a model of the MDIO slave PHY which was used to verify the MDIO master controller. Implemented Clock Domain Crossing (CDC) logic for transferring control & data signals across clock domains. The Verification environment used to test the controller was based on the UVM methodology.

Jun 2016 - Aug 2016

Executive Engineer, Central Engineering Centre

Tokyo, Jp

Integral in full life cycle design, development, prototyping, testing of analog, digital & mixed signal circuit designs related to Distributed Control Systems (DCS) hardware for three remote engineering projects based in the Middle East.* Worked under Senior technical managers and engineers and prepared System architecture, Network architecture and V-net/IP bus architecture for plant process areas based on the customer specifications. * Identified best concept/designs by rapidly pinpointing design issues and saved potentially several man hours by identifying strategic improvements to product life cycle and contributed to increased throughput.* Have profound knowledge and skills in different stages of complete project cycle right from FEED stage to project closure.* Hands-on experience with lab equipment like digital multi-meter, signal generator, oscilloscope, power supply & board units* Built collaborative rapport with domestic and international clients and earned outstanding remarks on performance, attention to detail, proficiency, quality and with special recognition for teamwork.

Jul 2013 - May 2015
Team & coworkers

Colleagues at Marvell Technology

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3 education records

Kiran Manjunatha education

Master Of Science (M.Sc.), Electrical And Computer Engineering

University Of Florida

Bachelor Of Engineering (B.E.), Electronics & Instrumentation Technology

B. M. S. College Of Engineering

Pre University, Electronics

Sri Bhagawan Mahaveer Jain College
FAQ

Frequently asked questions about Kiran Manjunatha

Quick answers generated from the profile data available on this page.

What company does Kiran Manjunatha work for?

Kiran Manjunatha works for Marvell Technology.

What is Kiran Manjunatha's role at Marvell Technology?

Kiran Manjunatha is listed as Senior Staff ASIC Digital Design Engineer at Marvell Technology.

What is Kiran Manjunatha's email address?

AeroLeads has found 1 work email signal at @marvell.com for Kiran Manjunatha at Marvell Technology.

What is Kiran Manjunatha's phone number?

AeroLeads has found 2 phone signal(s) with area code 352 for Kiran Manjunatha at Marvell Technology.

Where is Kiran Manjunatha based?

Kiran Manjunatha is based in Austin, Texas, United States while working with Marvell Technology.

What companies has Kiran Manjunatha worked for?

Kiran Manjunatha has worked for Marvell Technology, Marvell Semiconductor, Globalfoundries, Rockwell Automation, and Yokogawa.

Who are Kiran Manjunatha's colleagues at Marvell Technology?

Kiran Manjunatha's colleagues at Marvell Technology include Arun Easi, David Chiou, Lê Ngọc Minh Thư, Madhu Vemula, and James Lewin.

How can I contact Kiran Manjunatha?

You can use AeroLeads to view verified contact signals for Kiran Manjunatha at Marvell Technology, including work email, phone, and LinkedIn data when available.

What schools did Kiran Manjunatha attend?

Kiran Manjunatha holds Master Of Science (M.Sc.), Electrical And Computer Engineering from University Of Florida.

What skills is Kiran Manjunatha known for?

Kiran Manjunatha is listed with skills including C, Verilog, Vhdl, System Verilog, Python, Application Specific Integrated Circuits, Rtl Design, and Functional Verification.

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