Lance Wilcox, P.E. Email & Phone Number

Dallas, Tx, Us

Re-write standard memory code to reduce virtual memory usageDebug 60 imbedded SRAM system on chip devices, calculate repair solution, implement repairDevice repair includes multi-million-dollar platformsDevelop test program generator considering design and hardware inputs to create a first-pass loadable test program. Tests include: VOD, termination resistance, continuity, IDDQ, IDD, memory repair flowDebug and fix errors found in test program generatorMaintain memory methods interface code to LTX tester standard program including a programming logic change, redundancy analysis for memory repair, and a non-standard memory retrofitDevelop and implement customer trace code for Cisco and HUAWEI/HiSilicon devicesChair change-control board for test program generatorDevelop translator for LTX Fusion patterns to Teradyne IFlex patternsCreate TDL to MCC (standard burn-in oven) pattern converterVerify repair on developing technologiesDeveloped test for on-die parametric module including frequency count test, resistance test, IDLIN, IDSAT, VTLIN, and VTSATInclude inputs from physical design, design for test, and product engineering to create standardized hardware ordering formCreate yield analysis websites using SAS, R, SQL, PERL, and JavaScript to obtain data from Oracle databaseCreate yield analysis tools in Spotfire using JavaScriptDefine and implement required tests for PLL Characterization on automated test equipment; LTX Fusion and Teradyne CatalystMentor and train junior engineers in memory repair, programming, and test program debugCreate training classes for memory repair and on-die parametric testSupervise external contractors working for the ASIC business unit

Dallas, Tx, Us

Perform failure analysis on wafer scribe parametric modules, including identifying failures that prevented qualification of technology Complete SRAM defect analysis utilizing mechanical and chemical de-processing techniques, inspecting each layer with electron microscopes, and determining cause of defect Perform fail site isolation using liquid crystal, emission microscopy, and microprobe Set parameters in software analysis package to determine error code memory locations in each device, including logic map and in-line defect matching Develop failure analysis training for failure analysis engineers and technicians Supervise failure analysis of co-ops, technicians, and engineers