Marcus Lawrence Email and Phone Number
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Marcus Lawrence personal email
Marcus Lawrence is a highly respected and accomplished leader and engineer in all areas of backend SOC development with over 24 years of experience delivering an extensive array of flagship client, mobile, modem, and networking SOC product designs. He is currently a Senior Principal Engineer responsible for all backend technical leadership and project execution across multiple SOC's in Intel's 5G Networking Product Portfolio. Marcus brings extensive hands on technical experience and leadership in product planning, synthesis, APR, Power (flow and optimization), LV, STA, tape-out, and tools/flows/methodology. He has a proven and recognized track record for quickly identifying and solving problems as well as driving on time high quality project execution and decision making.Key Achievements:- Key technical leader on Intel's first mobile handset SOC (PNW). Complex SOC with new methodology, external IP's, new team, and low power emphasis provided many problems and challenges to solve. Enabled Intel to move into the mobile SOC space. Recognized technical leader for many of the follow on mobile SOC's.- Chief Backend Engineer for Intel's first LTE Modem on Intel Process (XG756). Drove execution through tape-out across multiple GEO's. Customer facing technical role in regular customer engagements. Mentored Intel China team through transition to Intel process on follow on LTE products.- Chief Backend Engineer for first 5G beam-forming radio ASIC SOC on Intel Process. Led heavy technical engagement with customer from design through execution helping to drive design changes and decisions beneficial to the product. Led on time project execution on very large SOC design in cutting edge technology.
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Intel FellowIntel Corporation Jun 2022 - PresentAustin, Texas, United States -
Soc Pd LeadMeta Nov 2021 - May 2022Austin, Texas, United States -
Senior Director Physical DesignMicrosoft Jul 2020 - Oct 2021Austin, Texas, United States -
Senior Principal EngineerIntel Corporation Mar 2019 - Jul 2020Austin, TexasChief Backend Engineer across multiple 5G networking products on the latest Intel technologies. Continue to work closely with key customers to help define better product landing zones as well as solve complex problems around scalability for future products. Manage and mentor a high performance backend team and growing new technical leaders to help expand the org’s capabilities. -
Principal Engineer (Ncsg 5G Networking Soc)Intel Corporation Oct 2016 - Mar 2019Austin, Texas AreaChief Backend Engineer on Intel’s first 5G Radio ASIC SOC’s. Drove tight collaboration with customer to define product requirements that met customer needs. Led backend execution, convergence and continual collaboration with customer through project completion. Developed many key TFM improvements enabling faster project TTM. -
Principal Engineer (Icdg Wireless Baseband Soc)Intel Corporation Mar 2014 - Oct 2016Austin, Texas AreaChief Backend Engineer for Intel’s first baseband processor (XG756) on Intel Process (14nm). Owned backend project execution across multiple Geo’s, driving improvements across multiple vectors to pull in and deliver an aggressive schedule. Drove TFM changes to enable lower power, lower TTM, and higher performance for key IP blocks. -
Soc Physical Design Tech Lead (Mobile Soc Products)Intel Corporation Oct 2008 - Mar 2014Austin, Texas AreaBackend technical lead for several mobile SOC products on multiple technology nodes (32,22,14 nm) including Intel’s first mobile phone CPU (PNW). Responsible for all areas of backend design convergence and execution from synthesis to GDS on many complex multi-domain partitions including full chip. Drove performance improvement and external benchmarking for key IP’s (GFX, Camera). Trained, mentored, and led backend execution for key SOC products outside of Org and Geo. Very active in TFM… Show more Backend technical lead for several mobile SOC products on multiple technology nodes (32,22,14 nm) including Intel’s first mobile phone CPU (PNW). Responsible for all areas of backend design convergence and execution from synthesis to GDS on many complex multi-domain partitions including full chip. Drove performance improvement and external benchmarking for key IP’s (GFX, Camera). Trained, mentored, and led backend execution for key SOC products outside of Org and Geo. Very active in TFM development and decision making across multiple products. Show less -
Cpu Physical Integration Lead (Ddg Cpu & Client Products)Intel Corporation Jan 1996 - Oct 2008Portland, Oregon AreaFull Chip, Cluster, and Block level physical integration for multiple generations of high performance client CPU’s. (WMT, NWD, PSC, NHM, WSM). Owned and delivered high quality designs through all phases of backend closure. Key contributor to TFM.
Marcus Lawrence Skills
Marcus Lawrence Education Details
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Willamette UniversityBus/Cs
Frequently Asked Questions about Marcus Lawrence
What company does Marcus Lawrence work for?
Marcus Lawrence works for Intel Corporation
What is Marcus Lawrence's role at the current company?
Marcus Lawrence's current role is Intel Fellow.
What is Marcus Lawrence's email address?
Marcus Lawrence's email address is ma****@****oft.com
What schools did Marcus Lawrence attend?
Marcus Lawrence attended Willamette University.
What skills is Marcus Lawrence known for?
Marcus Lawrence has skills like Application Specific Integrated Circuits, Static Timing Analysis, System On A Chip, Physical Design.
Who are Marcus Lawrence's colleagues?
Marcus Lawrence's colleagues are Eliyahu Cohen, Dr Emmanuel Massawe, Guy Elimelech, Esteban Badilla Barrantes, Kevin A Rathman, Steve Hiemstra, Vishal Sandhu.
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Marcus Lawrence
New York City Metropolitan Area4pinebridge.com, wharton.upenn.edu, auldbrasspartners.com, wafra.com -
👀 Marcus Lawrence
Where Classic Newsman And New-School Managing Editor Of Digital Content Overlap In The Venn Diagram.Boise, Id1thekrazycouponlady.com
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