Mark Mercado

Mark Mercado Email and Phone Number

Principal Engineer, Hardware Development at Western Digital @ Western Digital
5601 Great Oaks Parkway, San Jose,CA 95138,United States
Mark Mercado's Location
San Francisco Bay Area, United States
Mark Mercado's Contact Details

Mark Mercado personal email

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Mark Mercado phone numbers

About Mark Mercado

Innovative, capable and reliable Stanford graduate with 10+ years of product development experience in the high tech industry. Extensive experience in development and transfer from prototype phase to high volume manufacturing. Broad experience in statistical process control, DOE, data mining and machine learning with Python, R, SAS and SQL. Experience as a Program Manager with excellent communication and technical presentation skills.Three patents in materials and process for the data storage industry for thin film deposition with Chemical and Physical Vapor Deposition (CVD and PVD) systems. .

Mark Mercado's Current Company Details
Western Digital

Western Digital

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Principal Engineer, Hardware Development at Western Digital
5601 Great Oaks Parkway, San Jose,CA 95138,United States
Website:
wdc.com
Employees:
22750
Mark Mercado Work Experience Details
  • Western Digital
    Principal Engineer
    Western Digital Mar 2018 - Present
    San Jose, Ca
    Read Head Development
  • University Of California, Santa Cruz
    Professional Development
    University Of California, Santa Cruz Oct 2016 - Mar 2018
    Sunnyvale, Ca
    Data Analysis Certificate ProgramEnhance process engineering skills with Data Analysis Certificate (1Q2018) with projects and coursework in Python, R, SQL, Data Mining, Machine Learning, IoT, Kafka, Spark and AWS distributed cloud computing.
  • Hgst
    Senior Engineer, Thin Film Development
    Hgst Jan 2012 - Jul 2016
    San Francisco Bay Area
    Enabled first-to-market product releases of industry’s highest capacity storage products, over a 10+ year period, by continuous innovative development and seamless transfer of thin film media technology to our high volume manufacturing facility.• Achieved design breakthroughs by utilizing experience in process development, optimization, metrology and equipment for Chemical and Physical Vapor Deposition (CVD and PVD) systems.• Opened new development space by inventing, patenting and productizing novel plasma polish etch process (9,159,353) for both PVD (magnetron sputtering) and CVD hardware. Led team to implement this new technology across all product segments (mobile, desktop and server)• Systematically improved product designs utilizing factorial design of experiments (DOE) process and analyzing with JMP statistical software.• Increased rate of development and reduced data analysis time by creating Visual Basic programs for automatic trending of performance parametrics versus input design parameters.• Allowed on schedule qualification of the new media designs by converting pilot-line sputter tools to high volume manufacturing tools and implementing SPC with automatic trend charting of key build parameters.
  • Hitachi
    Senior Engineer, Thin Film Development
    Hitachi Jan 2003 - Jan 2012
    San Francisco Bay Area
    Developed thin film stack architecture, magnetic and non-magnetic alloys and sputter process for enterprise, mobile and desktop storage media products.• Allowed first-to-market release of new storage products by developing, patenting and productizing innovative onset layer (9,412,404) for thin film media grain isolation.• Verified design conformance and isolated build anomalies by developing SAS and SQL code for data mining and trending of sputter process data.• Hands on experience with XRR, XRD, XRF, Ellipsometry and VSM.• Directed and utilized AES, XPS, SEM/EDX, TEM, TOFSIMS, AFM and Optical Microscopy.
  • Ibm
    Staff Engineer (Program Manager)
    Ibm Jan 1999 - Jan 2003
    San Jose, Ca
    Staff Engineer (Program Manager) OEM Storage MediaEstablished first qualification of IBM magnetic media into external customer storage products. Managed key engineers and our overseas manufacturing team.

Mark Mercado Skills

Program Management Design Of Experiments Integration Thin Film Development Manufacturing Enterprise Software Thin Films Characterization Materials Science Sas Programming Jmp Statistical Software Cross Functional Team Leadership Microsoft Office Software Development Semiconductors Sql Queries Product Development Failure Analysis Nanotechnology

Mark Mercado Education Details

Frequently Asked Questions about Mark Mercado

What company does Mark Mercado work for?

Mark Mercado works for Western Digital

What is Mark Mercado's role at the current company?

Mark Mercado's current role is Principal Engineer, Hardware Development at Western Digital.

What is Mark Mercado's email address?

Mark Mercado's email address is ma****@****gst.com

What is Mark Mercado's direct phone number?

Mark Mercado's direct phone number is (312) 447*****

What schools did Mark Mercado attend?

Mark Mercado attended Stanford University, University Of California, Santa Cruz, University Of Illinois At Urbana-Champaign.

What skills is Mark Mercado known for?

Mark Mercado has skills like Program Management, Design Of Experiments, Integration, Thin Film Development, Manufacturing, Enterprise Software, Thin Films, Characterization, Materials Science, Sas Programming, Jmp Statistical Software, Cross Functional Team Leadership.

Who are Mark Mercado's colleagues?

Mark Mercado's colleagues are Saul Ferman, Rob Meyer, Mark Antoniono, Akash Kumar Gupta, Erica Mosley, Tawab Dastagir, Sofea Linny.

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