At Correct Designs I was a contract engineer working as a developer and consultant for client companies. I focused on DV, and infrastructure relating to pre-silicon development and bring up. I worked as an expert to advance the tooling and solve critical engineering challenges for our clients.

Developed verification plans and implemented testing for custom SoC using company architecture with ARM cores. Created coverage plan and built out testing to close the coverage. Modeled custom IO blocks with new and legacy interfaces. Validated system fabric connectivity and functionality. Created custom test plan to validate RTOS (Real Time Operating System) features as this was an automotive chip. Additionally built out bring up scripting to read in the CSR data from the design and create command line tooling to do peek/poke debug. Replaced existing infrastructure for CSR testing with much more comprehensive and capable tooling.

Developed SV/UVM testbenches from planning through coverage. Responsible for building functional verification infrastructure, understanding the design functionality as described in design documentation, developing test plans, and guiding functional verification of complex blocks pushing towards coverage goals thus ensuring a high product quality. Functional verification is achieved using the UVM testing methodology leveraging constrained random testing and coverage driven development. Extensive use of various bus protocols including AXI, SPI, I2C, and custom client bus designs. Analyzed test failures to determine cause and assist design with fixing those flaws.

Developed tools and support to wrap vendor EDA tools in a single script, allowing easy user launching of jobs. Handle support for hardware resources for each task, RAM, Cores, licenses. Manage computing farms running millions of simulations per day. Load balance and fair share between unit regressions and user jobs. Also load balance between flows for different teams and projects. Create integration flows for running smoke regressions against user changes and integrating code into main code base. Utilized git version control to track changes. Created flows for sharing code base changes in multiple git repositories supporting many projects, provide user support with version control, expert in git version control. Create tools and databases to collect and visualize data to track health of simulations. Provided user support for EDA tools, interfaced with EDA vendors to track user reported bugs with tools, and updated tool versions with the fixes.

Software development engineer responsible for IEEE 11.49.1 JTAG tools. Developed custom JTAG tools to interface through the DSTREAM box using the ARM RDDI library. Application also supports the use of the Corelis JTAG interface using the SFL. Leveraged the ARM Debug Interface to generate AHB and APB transactions through the ARM DAP. Software allows access to the internal DAP registers as well as access to the mapped memory within the SoC. Enabled debug of the internal system registers. Enabled read/write access to multiple partitions of the SoC. Software also enabled access to a custom JTAG TAP for access into system registers.

IBM: Software Development for Embedded Memory RepairDesigned and maintained a custom framework for memory repair solutions of both SRAM and DRAM. Implemented embedded repair solutions in 32nm and 22nm technologies. Wrote documentation of program development and subsequent revisions, inserting comments in the coded instructions so others can understand the program.IBM: Microprocessor Test Analysis Engineer Feb 2011 - PresentDeveloped test programs for complex microprocessors to match product specification with a keen emphasis on quality. Lead test engineer for a custom, system-on-a-chip product in IBM’s leading semiconductor technologies, shipping in excess of 1 million parts per month. Over 25 million devices shipped to customers.Supported high volume production test of these products in several worldwide locations. Implemented custom software for special purpose testing such as electronic fusing. Led implementation of adaptive testing framework, first deployment at IBM. Diagnosed fab yield problems and customer returns, directing failure analysis by means of test characterization. Led analysis or reliability studies on these products, including diagnosis and localization of failures.