Mohit Patel Email & Phone Number

Fort Collins, Co, Us

Santa Clara, California, Us

Santa Clara, California, Us

- Part of Intel’s Data Centre Group and working on Xeon based microprocessor verification.- Responsible for the full lifecycle of verification, from planning to test execution and including collecting and closing coverage. - Interacting closely with architecture and design teams to understand design/product requirements and develop comprehensive test plans.- Lead verification of two of the vital IPs for Reset Architecture for Xeon CPU Design.- Involved in SoC level full chip validation and validating reset based functionality of the chip.- Involved in creating tests with System Verilog/UVM to validate the design functionality both at SoC and IP level.- Developing structure for Functional Coverage measurement via test-plan and running regressions to make sure Design’s important features are covered with testing.- Expert in debugging test benches with EDA tool (Synopsys Verdi) and providing support to other IP teams to root cause the issue. - Involved building efficient and effective constrained-random verification environments that exercise designs through their corner-cases and verify that the design matches a golden model.- Conduct/participate in test plan and test reviews, develop verification components and tests, and triage failures.- Conduct security requirement reviews and validation requirements for several IPs.- Performed verification with JTAG TAP chain to validated IPs TAP based functionality.- Expert in JTAG/SVF based flow testing and debugging for Full Chip and Block level designs.- Validated the design with Machine Readable Flow (MRF) and help setup this flow for other IP teams and provided debug support.- Expert in setting up RAL (Register Abstraction Layer) flow in Test environment. In addition, helped few of the other design and SoC team to set up this flow.- Validated design’s register-based functionality with RAL flow and sourced vital bugs in the Chip design.

GSS - Functional Verification Support- Developed test cases in UVM and System Verilog, wrote scripts to help R&D quickly identify the root cause and work on a tool fixes immediately.- Delivered training to customers on Questa/Visualizer/QVIP tool flow, debugged their complex design/verification related challenges.- Assisted customers and AEs with technical debug related to tool crash, performance, combinational loops, coverage closure, etc.- Assisted the Field team and Account team to help the customer on license setup and evaluation support.- Developed various technical contents on common issues with Questa/QVIP and published on the Mentor website.- Responsible for assisting customers with various tool features across their multiple projects and provide support for migration to new version releases.- Assisted Product Team in beta testing of new features of Visualizer before deploying in customer environment.- Reported various tool bugs and involved in quality check for the fixes in new releases.- Delivered training on Questa/QVIP debug to India support team, monitored their progress, and helped them resolve their India customer issues.

Wilsonville, Or, Us

- Involved in the technical screening of Design/Verification engineers to uncover their requirements, help them understand how Mentor Graphics tools can be incorporated in their design flow.- Collaborated with the Sales team to uncover their territory’s potential leads for different Mentor Graphics products and create many sales opportunities for multiple Account Managers.- Delivered many technical presentations to my team on IC and PCB tools functionalities.- Involved in creating technical content for IC tools features and trained India Sales team on how they can help Account Managers generate great quality of leads and help them generate revenue for Mentor Graphics.- Worked with Calibre Technical Marketing team to help them create technical videos focusing on solutions to common issues. - Worked with Questa support team and Designed and Verified the RPN Calculator. - Became a team lead in a short span of time and helped my coworkers resolving their technical challenges. - Conducted technical skill telephone Interviews and became a key part in the hiring process of my teammates.- Involved in providing pieces of training to my coworkers on understanding Mentor Graphics’ IC Design tools functionalities and helped the team to meet assigned goals. - Involved in learning technical functionalities newly-acquired tools by Mentor and coached my coworkers to provide accurate technical information of those tools to customers.- Provided support to the Technical Writing team to promote and deliver technical content on Mentor Graphics’ website to help customers understand the various aspects of Mentor’s IC Design/Verification tools.

San Jose, Ca, Us

- Preformed warehouse and financial management for SJSU Campus.- Involved in preparing annual summery budget and performing tools inventory using Web TMA System.- Developed costumer relationship and management skills.

Master Of Science (M.S.), Electrical And Electronics Engineering

Master Of Science (M.S.), Electrical And Electronics Engineering

Bachelor Of Engineering (Be), Electrical, Electronics And Communications Engineering