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Niraj Jaiswal Email & Phone Number
Multiplier Using Schematic Design
at
PinE Training Academy of VLSI & Embedded
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✓ Verified August 2026
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Profile completeness 86%
Current company
Role
Multiplier Using Schematic Design
Location
Bilaspur, Chhattisgarh, India
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Niraj Jaiswal is listed as Multiplier Using Schematic Design at PinE Training Academy of VLSI & Embedded, a with 106 employees, based in Bilaspur, Chhattisgarh, India. AeroLeads shows a matched LinkedIn profile for Niraj Jaiswal.
Niraj Jaiswal previously worked as Hardware System Design using Schematics Design and Verilog HDL and its Implementation on FPGA from P at Pine Training Academy Of Vlsi & Embedded and Logic Gate Verification at Pine Training Academy Of Vlsi & Embedded. Niraj Jaiswal holds B. Tech from Government Engineering College Bilaspur.
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PinE Training Academy of VLSI & Embedded
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About Niraj Jaiswal
Niraj Jaiswal is a Multiplier Using Schematic Design at PinE Training Academy of VLSI & Embedded.
Current workplace
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Pine Training Academy Of Vlsi & Embedded
7 roles
Niraj Jaiswal work experience
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Hardware System Design Using Schematics Design And Verilog Hdl And Its Implementation On Fpga From P
Current
Aug 2023 - Present
Multiplier Using Schematic Design
CurrentImplement a 4-bit signed multiplier using schematic design with the help of Logic Gates, Half & Full Adder,2’s complement & Buffer circuits. Learning: Basics of Digital electronics, how our combinational logic circuit works. TOOL- Xilinx ISE Design.
Aug 2023 - Present
Logic Gate Verification
CurrentDevelop a testbench using SystemVerilog to verify logic gates like AND, OR, NAND, and NOR. Learning: In this project, I learned about how testbench works and what is the importance of testbench. Tools: Xilinx ISE Design.
Aug 2024 - Present
Signed Calculator Using Schematic Design
CurrentImplement a calculator using schematic design, and create a calculator using combinational logic like an adder, subtractor, multiplier, divider, multiplexer, demultiplexer, and decoder. Learning: Basics of Digital electronics, how our combinational logic circuit works. Face Difficulties: face difficulties like sometimes making wrong connections and developing logic. Tools: Xilinx ISE Design.
Aug 2023 - Present
Counters On Fpga
CurrentImplement different Counters (Synchronous, Asynchronous, Mod-5, Mod-8, Decade) using Verilog HDL and implement on the FPGA (NAXYS A7). Learning: Basics of sequential logic in digital electronics and Basic of FPGA (NAXYS A7). Tools: Xilinx VIVADO.
Aug 2023 - Present
Vhdl (Very High-Speed Integrated Circuit Hardware Description Language)
CurrentVHDL (VHSIC Hardware Description Language) is a hardware description language used to design and simulate digital systems. Here is an overview of VHDL design
Aug 2024 - Present
4 education records
Niraj Jaiswal education
B. Tech
Government Engineering College Bilaspur
10Th + 12Th, Mathematics, First
Government Dkp Higher Secondary School Kota
Training, Hardware System Design Using Schematics Design And Verilog Hdl And Its Implementation On Fpga
Pine Training Academy
Very High Speed Integrated Circuit Hardware Description Language
Pine Training Academy Vlsi Design Delhi
FAQ
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What company does Niraj Jaiswal work for?
Niraj Jaiswal works for PinE Training Academy of VLSI & Embedded.
What is Niraj Jaiswal's role at PinE Training Academy of VLSI & Embedded?
Niraj Jaiswal is listed as Multiplier Using Schematic Design at PinE Training Academy of VLSI & Embedded.
Where is Niraj Jaiswal based?
Niraj Jaiswal is based in Bilaspur, Chhattisgarh, India while working with PinE Training Academy of VLSI & Embedded.
What companies has Niraj Jaiswal worked for?
Niraj Jaiswal has worked for Pine Training Academy Of Vlsi & Embedded.
How can I contact Niraj Jaiswal?
You can use AeroLeads to view verified contact signals for Niraj Jaiswal at PinE Training Academy of VLSI & Embedded, including work email, phone, and LinkedIn data when available.
What schools did Niraj Jaiswal attend?
Niraj Jaiswal holds B. Tech from Government Engineering College Bilaspur.
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