Robert S. Ogg Email & Phone Number
@prodigy.net
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Robert S. Ogg is listed as Custom Analog Integrated Circuit (IC) Design Engineer at Open to opportunities, a company with 503 employees, based in San Jose, California, United States. AeroLeads shows a work email signal at prodigy.net and a matched LinkedIn profile for Robert S. Ogg.
Robert S. Ogg previously worked as Layoff/position eliminated at Career Break and Staff Engineer, Analog Design at Idt - Integrated Device Technology, Inc.(Acquired By Renesas). Robert S. Ogg holds Certificate In Vlsi, Electrical Engineering from University Of California, Santa Cruz Extension.
Email format at Open to opportunities
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AeroLeads found 1 current-domain work email signal for Robert S. Ogg. Compare company email patterns before reaching out.
About Robert S. Ogg
Analog/Mixed Signal Integrated Circuit (IC) Design Engineer with over 10 years of experience. Most of my projects have been in the field of the management and regulation of electrical power and low voltage to high voltage interface circuitry. My strengths include my scholastic background and my persistence. Electrical Circuits cells that I have worked on include Voltage-Controlled Oscillators (VCO), charge pumps, frequency dividers, counters, bandgaps, buck converters, analog to digital converters (ADC's), low voltage to high voltage level shifters, and power-on-reset circuits. Most of my design work used Cadence; at Renesas Electronics I had started using ADE-XL.My college education includes graduate school at the University of California at Irvine, where I received a Master's Degree in Electrical Engineer (MSEE) with an A- GPA, and my undergraduate study was at the University of California at Los Angeles (UCLA), where I received a Bachelor's Degree in Electrical Engineering (BSEE). Coursework that I have done more recently includes classes that I have taken at UCSC Extension includes radio frequency (RF) design, logic synthesis, FPGA design, Verilog, Verilog AMS, and introduction to SystemVerilog and at another college, I took Python, C++, and UNIX scripting. When I returned to IDT in 2018, they had been using a Main LDO cell with a programmable output voltage, but output voltage did not follow the codes that were expected. The first thing I did was to do the calculations based on the sizes of the resistor divider and confirm these with scripts, but these only confirmed that the calculations had been done correctly. I had run the cell over process, voltage and temperature (PVT), checked the linearity and stability of the amplifier, and even run post layout parasitic analysis, but these seemed to confirm that there was no problem. In spite of difficulties, I remained persistant, and eventually, after studying the schematic and the layout carefully, I noticed that some of the resistors in the divided were on top of nwell, while others were on top of pwell. At IXYS, I had learned that this affected the sheet resistance of the resistors, and was eventually able to get them to understand that they all should have been over pwell. The later projects did not have that problem.My hobbies include: Running, Hiking, Toastmasters, and Sudoku. Last year, I was able to complete a half marathon in less than two hours! In Toastmasters, I was awarded Competent Communicator.
Listed skills include Mixed Signal, Ic, Cmos, Semiconductors, and 43 others.
Robert S. Ogg's current company
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Robert S. Ogg work experience
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Layoff/Position Eliminated
CurrentI have interviewed at several companies, but have yet to find the right fit. I continue to practice oral communication skills through my involvement in Toastmasters, and I have been active in the C6 networking group.
Staff Engineer, Analog Design
- Modified a main LDO high voltage amplifier cell so that it could operate at a higher voltage and could be used in a less expensive TSMC process. The main LDO had an output voltage and current limit threshold that was.
- Simplified a startup/bias cell so that it would need fewer parts and consume less area on the chip. Improved the accuracy of a bandgap so that it could be used as the only bandgap
- Collaborated with a team of engineers to characterize a buck regulator startup issue that had been identified in a part that had been released for production
- Revised GPIO circuits so that their digital inputs would have hysteresis and function with low voltage input signals
- Provided design support to the product and test group for return merchandise authorizations (RMA’s) to keep customers satisfied
Mathematics Tutor
Guest Teacher
- Responsible for managing classrooms for teachers who are absent.
- Takes attendance, Inform students of their regular teachers' lesson plans, and helps them with mathematics and science homework.
- Brings "Sub-Pack" case filled with school supplies in case they are needed. Communicates with regular teacher through the use of "Welcome Back" forms.
- Has emergency 30-day substitute teaching permit with the state of California Commission on Teacher Credentialing (CTC).
Volunteer, Tech Services Team
- ProMatch is the Silicon Valley chapter of Experience Unlimited, which is a career development organization which is operated within NOVA, the north valley facility of the EDD.
- Assisted with running ProMatch meetings in the Sergeant of Arms, Projectionist, Timekeeper, and Usher roles and added to their discussions with respect to job transition.
- Provided support for the NOVA computer room, assisting their clients with internet use
Staff Verification Support Engineer
- Created a SystemVerilog model of a Delay-Locked Loop (DLL) for mixed-signal verification. The cell’s output frequency was proportional to its input frequency within a certain range.
- Provided support for the implementation of assertions for the customer’s digital simulations.
Staff Electronic Design Engineer
- Revised a successive approximation register (SAR) analog to digital (ADC) for use in a wireless power receiver and transmitter chipset. It has a 12 bit resolution (4096 levels), and runs at 125kHz sample rate
- Created a predriver for two sets of two high voltage switches. One set was for communication by the receiver to the transmitter, the other set was for clamping.
- For later Wireless Power Products, made revisions necessary for the bandgap, the under voltage lockout, the high-voltage over-voltage detection circuitry, and the test multiplexer.
- Generated an Audio amplifier for a line out application which had some very demanding signal to noise ratio (SNR) and total harmonic distortion (THD) specifications.
Senior Design Engineer (Contract Position)
- Analysis and Synthesis of integrated circuits for Biomedical applications.
- Assisted in the characterization of the product through the use of a Matlab program
Senior Design Engineer
- Assistance in Project Definition
- Micromanipulator Probing to determine design issues
- Integrated Circuit Schematic Synthesis and Analysis
- Supervision of Mask Designer
- Use of OrCAD for IC circuits
Senior Design Engineer
- Linear Regulator projects, Switching Regulator projects, etc.
- Analysis and Synthesis of integrated circuit schematics
- Simulation of Schematics with SpectreS and Cadence Virtuoso
- Initial characterization of chips in laboratory
- Micromanipulator work to debug designs and mask design issues
- Supervision of mask designers
Design Engineer
- Analysis and Synthesis of integrated circuit designs using Cadence Simulation of circuit designs
- Both Supervision of Mask Design, and also did some mask design personally
- Characterization and Debugging of Supertex chips in laboratory
Colleagues at Open to opportunities
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David L. Rich
Colleague at Open To OpportunitiesOrlando, Florida, United States, United States
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EA
Ernestina Ayatey
Colleague at Open To OpportunitiesAccra, Greater Accra Region, Ghana, Ghana
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TB
Tyler Buttler
Colleague at Open To OpportunitiesPoteet, Texas, United States, United States
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KT
Karen Thurner
Colleague at Open To OpportunitiesLecanto, Florida, United States, United States
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MO
Michael Oke
Colleague at Open To OpportunitiesLagos, Lagos State, Nigeria, Nigeria
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FE
Farid Eslambolchi
Colleague at Open To OpportunitiesGreater Montreal Metropolitan Area, Canada
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EV
Edward Vandehey
Colleague at Open To OpportunitiesPortland, Oregon Metropolitan Area, United States
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PM
Philip Marlowe
Colleague at Open To OpportunitiesHelotes, Texas, United States, United States
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AA
Abhinav Anand
Colleague at Open To OpportunitiesLucknow, Uttar Pradesh, India, India
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OS
Omar Shehab El-Din
Colleague at Open To OpportunitiesGreater Chicago Area, United States
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Robert S. Ogg education
Certificate In Vlsi, Electrical Engineering
Certificate In Embedded Systems, Electrical And Electronics Engineering
Ms, Electrical Engineering
Bs, Electrical Engineering
Frequently asked questions about Robert S. Ogg
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What company does Robert S. Ogg work for?
Robert S. Ogg works for Open to opportunities.
What is Robert S. Ogg's role at Open to opportunities?
Robert S. Ogg is listed as Custom Analog Integrated Circuit (IC) Design Engineer at Open to opportunities.
What is Robert S. Ogg's email address?
AeroLeads has found 1 work email signal at @prodigy.net for Robert S. Ogg at Open to opportunities.
Where is Robert S. Ogg based?
Robert S. Ogg is based in San Jose, California, United States while working with Open to opportunities.
What companies has Robert S. Ogg worked for?
Robert S. Ogg has worked for Open To Opportunities, Career Break, Idt - Integrated Device Technology, Inc.(Acquired By Renesas), Varsity Tutors, and Teachers On Reserve.
Who are Robert S. Ogg's colleagues at Open to opportunities?
Robert S. Ogg's colleagues at Open to opportunities include David L. Rich, Ernestina Ayatey, Tyler Buttler, Karen Thurner, and Michael Oke.
How can I contact Robert S. Ogg?
You can use AeroLeads to view verified contact signals for Robert S. Ogg at Open to opportunities, including work email, phone, and LinkedIn data when available.
What schools did Robert S. Ogg attend?
Robert S. Ogg holds Certificate In Vlsi, Electrical Engineering from University Of California, Santa Cruz Extension.
What skills is Robert S. Ogg known for?
Robert S. Ogg is listed with skills including Mixed Signal, Ic, Cmos, Semiconductors, Integrated Circuit Design, Analog, Verilog, and Debugging.
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