Product Development Engineer
Current- Working on Test Development for Wafer-Level Sort and Package-Level testing of logic and memory products fabricated using Intel's latest manufacturing technology process node with Intel Foundry Services group.- Worked on R&D of next generation memory technology (3D XPoint) with Intel's Non-Volatile Memory Solutions Group.- Responsible for wafer-level test development as a part of Sort team. It includes developing test flows in C++, generating patterns to communicate with the device and logging and validating the results of the tests to check the performance of the device. Also involved in debugging/troubleshooting the device testing using waveform analyzers.- Working on testing the reliability of the device on a wafer-level by developing tests for checking the failure mechanisms. Developing stress tests that rigorously cycle the array at high temperature and then check for the bit error rates, data retention rates and any other impacts to the memory.- Responsible for carrying out engineering runs on wafers and packaged parts using memory testers in a pre-production environment for R&D. Also involved in facilitating the Fab in carrying out production runs.- Skills involved are C++, Semiconductor Device Physics, Digital Logic and Version Control for maintaining a large code base.
