Sherman Chang Email & Phone Number

Hillsboro, Or

• 5+ years working experience at Intel. Currently manage the analog circuit yield of advanced silicon processes to support internal CPU design teams• Led task forces with cross-functional teams to quickly resolve complex yield and quality issues by brainstorming fault models, prioritizing debug activities, and managing resources• Processed and analyzed large datasets of manufacturing/test data to help drive resource allocation, and strategically improve design quality and manufacturing processes

Graduate research assistant in Electrical and Computer Engineering under the supervision of Professor Kwang-Ting (Tim) Cheng. Major projects include: 1) Efficient test strategies for digitally-calibrated designs such as high performance analog-to-digital converters (ADCs) and radio-frequency (RF) receivers;2) Design and test of a self-testable, self-adjustable direct frequency modulator for GSM/EDGE systems;3) Test strategies and error-tolerant schemes for 3D heterogeneous integrated circuits and systems

Worked on test strategies for 3D CMOS Imagers

Summer employment at ITRI, Taiwan working on a 3D CMOS Imager project

Analyzed and tested a wide-bandwidth direct frequency modulator for GSM system

Involved in developing a new phase-locked loop (PLL) architecture for direct frequency modulation

Conducted competitive landscape analysis of the world-wide micro-controller market

Developed a verification platform for for a CMOS image sensor system-on-chip (SoC)

Ph.D., Electrical And Computer Engineering

Activities and Societies: Taiwanese Student AssociationPh.D. Thesis: "Low-cost Quality Assurance Techniques for High-Performance.

Ms, Management Sceince And Engineering

Ms, Electrical Engineering

Activities and Societies: Stanford Taiwanese Student AssociationTeaching Assistant, EE273 Digital Systems Engineering, Winter 2006

B.Engr, Electrical And Electronics Engineering

Completed "Secondary Education Program"