Sk Lee

Sk Lee Email and Phone Number

Product Development Engineer at Intel Corporation @ Intel Corporation
santa clara, california, united states
Sk Lee's Location
Pahang, Malaysia, Malaysia
Sk Lee's Contact Details

Sk Lee work email

Sk Lee personal email

n/a
About Sk Lee

•Five years experiences in Logic Verification and Design.•Verilog, System Verilog, VHDL, C, PERL.•Expertise in coding test benches, writing detailed test plan for team.•Expertise in setting up regression environment and revision control.•Expertise in setting up enhanced random testing environment, devising coverage methodologies.•Expertise Debugging skill in RTL, Post Synthesis (GATE) and Post APR simulation environment.•Experience working with cross-functional teams including Design, Verification, Systems Groups and Marketing for successful tape out of products.Specialties: •Specialties H/W Description Language : VHDL, Verilog, System Verilog•EDA Tools : VCS (Synopsys), NCSIM (Cadence),ICCR•CAD Tools : Virtuoso(Cadence), Mentor Graphics Design Suite•Languages : PERL, C, Unix Shell scripting.•Linux, Sun Solaris, Windows•Debugging Tools : Novas Debussy, Verdi, SimVision (Cadence)

Sk Lee's Current Company Details
Intel Corporation

Intel Corporation

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Product Development Engineer at Intel Corporation
santa clara, california, united states
Website:
intel.com
Employees:
133841
Sk Lee Work Experience Details
  • Intel Corporation
    Product Development Engineer
    Intel Corporation Mar 2018 - Present
  • Robert Bosh Car Multimedia And Infortainment
    Senior Software Test Engineer
    Robert Bosh Car Multimedia And Infortainment Mar 2016 - Mar 2018
    Penang, Malaysia
    • 1+ years experiences on Customer Diagnostic Testing and Production Diagnostic Testing for Car Multimedia product.• Responsible for checking software applications for defects to ensure the system functions before release to the customer or production.• Accomplishment: SOP of GWM T-Box Bundle 1, OSR of Daimler TCC Touch.• Design and develops test cases to ensure coverage of internal and external customer expectations by analyzing and understanding system requirements and design specifications, applying standard test case development techniques.• Implement test as defined in test plan by executing test cases of the assigned test packages.• Reports defects/failures with clear and concise description into Defect Management System (JIRA, RTC or similar) by following standard defect description structure defined by Centra (Domain Test).• Create test environment consisting of both hardware and/or software by understanding the system configuration used by the customer/production.• Applies special technical practices in system test e.g. test automation, vehicle networking test and/or other special test areas.• Provides instruction or coaching to others at junior positions.• Contributes toward test project success by providing improvement suggestions to the team.
  • Altera
    Ip Design Verification Engineer
    Altera Apr 2012 - Jan 2015
    Penang, Malaysia
    • ~3 years experiences on IP Hardware Design & Verification.• Collaborate with global engineering and technical marketing teams in defining, developing and producing IP solution and design tools suite for High-speed serial interface IP with transceivers.• Hardware verification and device checkout.• Device support and features.
  • Spansion
    Pre-Silicon Verification Senior Design Verification Engineer
    Spansion Jan 2006 - Nov 2011
    Penang, Malaysia
    45nm and 65nm Nor Flash Memory•Directed the setup of the complete System Verilog/C++/Perlverification environment including testbench and regression scripts•Enhanced the random testing environment.•Enhanced the random template coverage and introduced new method of random testing.•Enhanced Emulator based Coverage Analysis behavior model in Verilog code.•Devised coverage methodology to achieve 99% functional coverage•Wrote a detailed test plan.•Closely working with team to meet aggressive tapeout schedule.Platform Chip Verification•As Lead of Penang Site engineer to work closely with cross site Verification Project Lead towards successful verify functionality.•Wrote 300+ tests, few Verilog algorithm checkers and array checker to measure performance to Spec.ORNAND Flash memory product•Part of team which delivered functional first Silicon.•Involved in directed test development, behavioral model development and also random templates development.NOR Flash memory Silicon Debug and Fix•Define the root cause of Silicon issue and proposed a FIB fix to Design team.ibis modeling•Involved in ibis modeling.•Wrote a perl script to compile final report of ibis modeling.

Sk Lee Skills

Verilog Vhdl Systemverilog Perl Unix Shell Scripting Ncsim Vcs Cadence Virtuoso Logic Design Debugging Eda Semiconductors Functional Verification Simulations Ic Fpga Design Verification Testing

Sk Lee Education Details

  • University Teknologi Tun Hussein Onn
    University Teknologi Tun Hussein Onn
    Computer Engineering

Frequently Asked Questions about Sk Lee

What company does Sk Lee work for?

Sk Lee works for Intel Corporation

What is Sk Lee's role at the current company?

Sk Lee's current role is Product Development Engineer at Intel Corporation.

What is Sk Lee's email address?

Sk Lee's email address is sk****@****ion.com

What schools did Sk Lee attend?

Sk Lee attended University Teknologi Tun Hussein Onn.

What skills is Sk Lee known for?

Sk Lee has skills like Verilog, Vhdl, Systemverilog, Perl, Unix Shell Scripting, Ncsim, Vcs, Cadence Virtuoso, Logic Design, Debugging, Eda, Semiconductors.

Who are Sk Lee's colleagues?

Sk Lee's colleagues are Aseem Athavale, Shiran Shperberg, Brandon Teh, Rebecca Robles, Noa Kraicer, Simarpreet Kaur, Ph.d., Samantha Swan.

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