• Active secret security clearance. CompTIA Security+ training• Architecture support of common platform and open mission system code. CMake build system to generate Makefiles and solutions using platform toolchain. Ported to wide variety of architectures (MSVS, MacOS, RedHat, Debian, WRLinux, VxWorks, Integrity)• Experienced with Agile development, scrum, continuous integration. Atlassian tool suite (Jira, Confluence, FishEye/Crucible, BitBucket, Bamboo).• Setup automated build and test environment (Jenkins/Bamboo). Scripting for environment, build configuration, target compilation, post processing and execution for native and remote cross targets. Provided one-button push to launch simultaneous build with cluster of remote agents. Maintenance of tools and capabilities• Remote target execution scripts with bash, DOS cmd, python, secure shell, etc. Reporting of test cases with GoogleTest and JUnit parser to display results• Simulated embedded target architectures (ARM, PPC, WRLinux) using QEMU emulation and KVM or VMware virtualization. Cost savings in procurement.• Creation of multi-arch binary repository of compiled source code to meet dependencies.• Installation and config of Curtiss Wright VPX6 (x86/PPC) embedded processors. Creation of custom minimized WRS Linux Platform image with WorkBench, BitBake for deployment filesystem and sysroot tools. iPXE network boot with system services• WRS VxWorks user (RTP), kernel (DKM) and 653 non-cert. Also worked with Integrity RTOS and 178B for safety critical application of middleware.

President and principal engineer for technical services S-corp as an independent consultant. Supported tasks for short and long term contracts. Provide technical professional services in specialty areas.

• Ti KeyStone II architecture evaluation and application development. Embedded Linux ARM code development, native Linaro Ubuntu distribution. Worked with multi-core DSP C6X with Ti MCSDK-HPC toolkit, OpenMP accelerator for early evaluation and benchmark analysis.• Nvidia GPU performance analysis with CUDA, cuFFT, Thrust and ArrayFire in C++ environment. • Field Applications Engineer and pre-sales support of HPC embedded architecture featuring Intel x86_64, InfiniBand, OpenMPI, and GPU. Technology evaluation, performance benchmarking and demonstration of HPC tools. LINPACK, HPC/HPEC Challenge, and NAS Parallel (NPB). • Analysis of processor floating point performance including PPC AltiVec and x86 SSE. Summarized compiler (GCC/ICC) performance of SIMD vector ‘C’, tree vectorize and OpenMP. Also math libs with IPP, MKL and FFTW. Ported and optimized vendor ISSPL and VSIPL math libraries to Linux x86_64 with timing and validation.• Network performance analysis with Myrinet, 10Gb Ethernet and 40Gb InfiniBand. Benchmarks and demo applications include Pallas (PMB), POVray tracing and Mandlebrot rendering.• Created Annapolis Microsystems CoreFire FPGA data flow fixed-point application for digital radio basebanding and convolution. Data generation, simulation, SNR and validation analysis with MATLAB. GEDAE data flow language validation on CSP architectures. • Evaluation of deterministic real-time performance of RADAR application including VxWorks/Linux, vanilla/preempt kernels, and MPI/SMP multicore. Summarized into trade show presentations.• Setup demonstration center for cluster evaluation via secured Internet access. System administration, service configuration, network security and user support. Gathered performance metrics, benchmarks, and demonstration software. Incorporated remote system cluster monitoring via web interface (Ganglia, SNMP/MRTG).

• Support of design for Weather Extractor Computer (WEC) in selection of competing architectures. MPICH2 evaluation, configuration and training. Cluster services configuration of Dual Xeon (SMP) with bonded NICs.• Onsite integration of Systran FPDP device to Navy SPS-48 radar system. RAID-5 redundant striped journaled disk configuration. Disk cloning procedure designed for production units.• UNIX STIG security readiness review and security audit for RedHat Linux OS. Hardened WEC services configuration prior to connection to SIPRNET. Interfaced with auditor and documentation of changes.

Similar FAE support with Linux SMP PPC G4 PCI product interconnected with InfiniBand fabric.

Similar FAE support with Linux PPC G4 VME product with close coupled FPGA for FFT/FIR application.

Pre-sales customer meetings, presentations, benchmarks, system sizing, I/O interfaces, and request for proposals (RFP). Post-sales support included onsite installation, configuration, acceptance test and training. Provided technology briefings and studies to engineering group, technical conferences and industry trade shows. Linux/VxWorks Quad PPC G4 VME product with Myrinet fabric, military, rugged, hot swap, and fast boot

• Engineering Specialist in HPC Advanced Technology group. Configured and developed software for embedded single board computer (SBC) host and multi-processor DSP slaves. RADAR processing software prototyping (pulse compression, Doppler, Space Time Adaptive Processing, QRD). Experienced competing vendors (Mercury, SKY, CSPI) for RASP architecture selection. Characterized performance on large scale Mercury PPC G3 and SHARC system using Mitre benchmarks including real-time STAP.• Developed I/Q interface/ injector device API libraries to control RACE daughter cards to the JSTARS RADAR. Fiber Channel RACE device library interface to the Myriad Logic cards for RAID SCSI storage. Developed Scalable Playback System injection system to re-play flight recorded IQ data for laboratory.• Performance analysis for PPC G4 AltiVec vector processing unit for complex FFT, DOT, MADD. Investigation of VSIPL, SIMD vector instructions and performance optimization strategies for applications.• Initial evaluator for Linux OS in a multi-computer environment with GigaBit, Myrinet, and MPI using both Apple and CSPI PPC G4 systems. Recommended Linux OS for server, workstation and embedded targets.

Senior Engineer DSP activities in Special Projects including TMS320C30/40 vector processing performance optimization. Included 1553 host DSP interface and communication message protocol development. Developed ROM based boot application to dynamically load RAM based flight program.

Group leader and technical point of contact with NUWC SONAR contract. Successful rapid prototyping, R&D demonstrations and deployment were directly responsible for contract renewal for six years. Principle Engineer in DSP software for linear and log spectral analysis applications for passive VLF SONAR with AN/SQR-19 towed array. Designed single and multiple aperture time domain beamformers. DIFAR demodulation capability for directionality. Auto-correlation and active noise cancellation applications.

Re-designed portion of the Vibration Conditioner system for the Signal Data Processor of the F/A-18(C) aircraft. This included system mathematics, electrical circuits and software modules based around the TMS320C10 fixed point DSP. Received an award for extraordinary achievement in product design. Electrical design experience in analog and digital circuits including embedded micro-controllers, data acquisition, signal conditioning, active filters and power supplies. Experience in Automatic Test Equipment design.