Tatevik Khachatryan Email & Phone Number
Who is Tatevik Khachatryan? Overview
A concise factual answer block for searchers comparing this professional profile.
Tatevik Khachatryan is listed as ASIC Physical Design Engineer @ Cisco at Cisco, a with 91694 employees, based in Armenia. AeroLeads shows a matched LinkedIn profile for Tatevik Khachatryan.
Tatevik Khachatryan previously worked as Sr ASIC Physical Design Engineer at Cisco and ASIC Physical Design Engineer at Cisco. Tatevik Khachatryan holds Master'S Degree, Microelectronic Circuits And Systems In Communication from European University Armenia.
Email format at Cisco
This section adds company-level context without repeating Tatevik Khachatryan's masked contact details.
Review company-level records connected to Tatevik Khachatryan before choosing the right outreach path.
About Tatevik Khachatryan
3+ year experience in ASIC Physical Design and Automation.Good understanding in the fundamentals of CMOS.Knowledge in the Digital Design Concepts and Basic Electronics.Experience in cut edge technologies including 7nm, 5nm.Good understanding in Statistical Timing Analysis, On-Chip Variations and Timing Parameters.Good knowledge in ASIC Physical Design (RTL to GDS flow)Proficient in complete ASIC backend flow including Synthesis, Block level and Top/Hierarchical Floorplan, Full Chip Power and Bump Planning, PnR, Analog IP integration, STA and Sign-off, PV, FM etc.Good understanding and experience in Analog IP integration such as PLL, SerDes, etc.Experience in training new team members in Top-Level PD/STA and Hard IP Block closure.Automation experience including ownership of ASIC Flow from Synthesis to Sign-off.Post-Silicon Timing analysis and review, silicon-freeze manual ECOScripting languages: Python, TCL, ShellEDA Tools: HSPICE, Custom Designer, VCS, Design Compiler, IC Compiler, Fusion Compiler, PrimeTime, Innovus, Tempus, CalibreExperience with Cadence and Synopsys tools
Tatevik Khachatryan's current company
Company context helps verify the profile and gives searchers a useful next step.
Tatevik Khachatryan work experience
A career timeline built from the work history available for this profile.
Asic Physical Design Engineer
• Analog IP Integration and Block PnR: - Floorplanning - Bump Planning - Clock Tree Synthesis (automation of CTS enhancements for multiclock block) - Timing Analysis and Closure, ECO, Signoff - Physical Verification and debug (DRC/LVS/ERC/ANT), etc.• Hierarchical PD including: - Bump Planning and RDL Route - Full Chip ESD Planning - Floorplan Automation for Full Chip - Automation of Block Integration at Full Chip - Full chip FM• ASIC Flow ownership from Synthesis to Signoff• Interactive work with Vendors• New hire PD trainings and support• Chip Logo cell layout
Intern
Colleagues at Cisco
Other employees you can reach at cisco.com. View company contacts for 91694 employees →
Sean Baker
Colleague at CiscoRaleigh, North Carolina, United States
View →
MJ
Marco J.
Colleague at CiscoLondon Area, United Kingdom
View →
PT
Pierce Tan
Colleague at CiscoSingapore
View →
KK
Kanish Kar
Colleague at CiscoChennai, Tamil Nadu, India
View →
SC
Steven Chen
Colleague at CiscoDalian, Liaoning, China
View →
SS
Sumit Seth
Colleague at CiscoAdelaide, South Australia, Australia
View →
SN
Sankar Narayanan
Colleague at CiscoChennai, Tamil Nadu, India
View →
LS
Ling Shi
Colleague at CiscoChangzhou-Wuxi-Suzhou Metropolitan Area, China
View →
AK
Aron Kerekes
Colleague at CiscoBudapest, Hungary
View →
RL
Royal Line
Colleague at CiscoAthens, Ohio, United States
View →
Tatevik Khachatryan education
Master'S Degree, Microelectronic Circuits And Systems In Communication
Master'S Degree, Microelectronic Circuits And Systems In Communication
Bachelor'S Degree, Microelectronic Curcuits And Systems In Communication, 100
Bachelor'S Degree, Information Technology (Microelectronic Circuits And Systems In Communication), 100
Software Support For Computers And Automated Systems
Frequently asked questions about Tatevik Khachatryan
Quick answers generated from the profile data available on this page.
What company does Tatevik Khachatryan work for?
Tatevik Khachatryan works for Cisco.
What is Tatevik Khachatryan's role at Cisco?
Tatevik Khachatryan is listed as ASIC Physical Design Engineer @ Cisco at Cisco.
Where is Tatevik Khachatryan based?
Tatevik Khachatryan is based in Armenia while working with Cisco.
What companies has Tatevik Khachatryan worked for?
Tatevik Khachatryan has worked for Cisco.
Who are Tatevik Khachatryan's colleagues at Cisco?
Tatevik Khachatryan's colleagues at Cisco include Sean Baker, Marco J., Pierce Tan, Kanish Kar, and Steven Chen.
How can I contact Tatevik Khachatryan?
You can use AeroLeads to view verified contact signals for Tatevik Khachatryan at Cisco, including work email, phone, and LinkedIn data when available.
What schools did Tatevik Khachatryan attend?
Tatevik Khachatryan holds Master'S Degree, Microelectronic Circuits And Systems In Communication from European University Armenia.
Search by job title, company, industry, location, and seniority. Export verified B2B contact data when you need it.
Start free trialCheck these profiles if this is not the Tatevik Khachatryan you were looking for.
View similar profiles