William Sutherland Email & Phone Number

William Sutherland is a IC Design Engineer at Broadcom Limited. He possess expertise in timing closure, physical design, static timing analysis, integrated circuit design, asic and 14 more skills. Colleagues describe him as "William was one of my key direct reports in the Vitesse CMOS PD design center. He was the lead physical designer on the first design Vitesse ever did using Magma. This design was a switch fabric chip in TSMC 180nm CMOS. William pioneered our interface with the front-end delivery qualification, a key to our success. William led the definition of the hierarchy in the front-end and back-end, resolved constraint issues, refined floorplanning issues for all block-level designs, created the flow for Glassbox incorporation, delivered block-level data to the block builds, integrated the final blocks, led final timing analysis and final ECO. The resultant chip design was the most successful chip ever done at Vitesse; starting up on the ATE, it was passing functional tests within a day, inserted into the box-level system with no significant errata within a week. This entire effort defined the basis for William's masters program in which he demonstrated the design of RTL to GDS flows."

Listed skills include Timing Closure, Physical Design, Static Timing Analysis, Integrated Circuit Design, and 15 others.