Investigated and oversaw redesigns of many Intel Xe discrete graphics driver features, including memory location placement for different heaps, CPU overhead reduction, and shader constant data management for the DirectX drivers. Designed and implemented DX11 user mode driver’s 3D shader link time optimizations, achieving up to 19% performance gains in some games. Developed a new compiler interface and utilized threading to offload the additional compilation.Developed a driver… Show more Investigated and oversaw redesigns of many Intel Xe discrete graphics driver features, including memory location placement for different heaps, CPU overhead reduction, and shader constant data management for the DirectX drivers. Designed and implemented DX11 user mode driver’s 3D shader link time optimizations, achieving up to 19% performance gains in some games. Developed a new compiler interface and utilized threading to offload the additional compilation.Developed a driver library that collects performance data, dynamically adjusts configurations, and recompiles shaders for optimal performance. Results are saved to minimize profiling overhead. Applied optimizations to DX11, DX12, and Vulkan drivers. Co-authored a patent on the concept.Developed a methodology to quantify costly HW commands (stalls, flushes, etc.) on complex workloads in an automated software environment, and integrated this test infrastructure into a continuous integration system.Created an automated methodology for applying Microsoft Compiler's profile guided optimization to the build system, profiling popular applications to optimize hot paths in the graphics driver. Achieved up to 20% instruction reduction in popular applications. Show less

Manages a team of nine to eleven engineers focused on balanced performance and power on 4th, 5th, 6th and future Generation Intel® Core™ and Atom™ Processors on Windows DX9, DX11, & DX12 workloads. Responsible for setting priority and schedule on performance analysis and software development tasks. As well as driving methodology improvement initiatives throughout the global performance team. Provide technical direction by reviewing software design and driver… Show more Manages a team of nine to eleven engineers focused on balanced performance and power on 4th, 5th, 6th and future Generation Intel® Core™ and Atom™ Processors on Windows DX9, DX11, & DX12 workloads. Responsible for setting priority and schedule on performance analysis and software development tasks. As well as driving methodology improvement initiatives throughout the global performance team. Provide technical direction by reviewing software design and driver changes.Coordinate across global sites, external customers, and independent software vendors on 3D graphic performance issues. Show less

DX9 Driver Technical Lead of a team of twelve engineers. Responsible for new driver design and implementation of lightweight, immediate programming of Intel 3rd and 4th Generation Intel® Core Processors. The driver eventually replaced previous implementation with substantially less CPU overhead at the same or better GPU performance. Worked with program manager on creating schedules and milestone for the project. Contributed to the design and implemented a C++… Show more DX9 Driver Technical Lead of a team of twelve engineers. Responsible for new driver design and implementation of lightweight, immediate programming of Intel 3rd and 4th Generation Intel® Core Processors. The driver eventually replaced previous implementation with substantially less CPU overhead at the same or better GPU performance. Worked with program manager on creating schedules and milestone for the project. Contributed to the design and implemented a C++ template infrastructure to program multiple generations of hardware in a single binary.Contributed to the design and implemented a multi-threaded shader compilation path.Worked with Microsoft on API changes on DX9 and WDDM 1.1 for Windows 7 and WDDM 1.2 for Windows 8. Show less

Worked on DX9, DX11, and kernel mode reference drivers for Intel®’s ‘Larrabee’ Microarchitecture. Responsible for the design and implementation of the resource management and copy logic including a small multithreaded application that ran on GPGPU.

Technical led a small engineering team on porting a Windows XP driver implementation to Windows Vista WDDM 1.0 on Intel® G945 & G965 Chipsets. Significant refactor of memory management was necessary keep maintenance costs low. Designed and implemented a GPU command processor interface to support multiple generations of hardware commands. Triaged, debugged, and fixed 100s of issues across Intel®’s chipsets occasionally working with customers and Microsoft on their… Show more Technical led a small engineering team on porting a Windows XP driver implementation to Windows Vista WDDM 1.0 on Intel® G945 & G965 Chipsets. Significant refactor of memory management was necessary keep maintenance costs low. Designed and implemented a GPU command processor interface to support multiple generations of hardware commands. Triaged, debugged, and fixed 100s of issues across Intel®’s chipsets occasionally working with customers and Microsoft on their certification tests. Show less

Responsible for DX3-DX8 application test plans for the Intel®’s chipsets. Developed and executed tests on a regular cadence. Reported results to upper management by provided regular health assessments of the driver. Developed a DX8 application test framework and created test cases using the new features of the API before other workloads were available. Worked with an external team on developing requirements for a test matrix infrastructure to store functional and performance… Show more Responsible for DX3-DX8 application test plans for the Intel®’s chipsets. Developed and executed tests on a regular cadence. Reported results to upper management by provided regular health assessments of the driver. Developed a DX8 application test framework and created test cases using the new features of the API before other workloads were available. Worked with an external team on developing requirements for a test matrix infrastructure to store functional and performance test results. Show less

Responsible for creating and executing DX3 & DX5 application test plans for the Intel®’s 740 Graphics Card.Triaged results against competitive products to determine likelihood of application or driver implementation bugs.

Validated for functionality and performance a set of strategic partner set of multimedia application for launch of the first MMX instruction processors. Co-developed a DX3 scripting application framework to quickly develop simple 3D application for platform testing.