Pursuing Undergrad at NIT, Trichy with major in Electrical and Electronics Engineering (EEE). Aspiring Electronics Enthusiast deeply intrigued by the world of VLSI. My passion lies in crafting and advancing Integrated Circuits that drive the modern world. Proficient in Verilog with hands-on project experience.My experiences include:🔸 Internship under Dr. Joycee Mekie of the Electrical Engineering Department of IIT GANDHINAGAR. Project Title: Analyzing Digital SRAM based In-Memory Computation (IMC).- Did Simulations for various SRAM arrays with bit-serial and bit-parallel based compute logic in Cadence Virtuoso.🔸 Internship under Dr. Shivam Verma of the Electronics Department of IIT BHU. Project Title: Device circuit co-design for non-volatile latch using Ferroelectric FET (FeFET). - Did Simulations for various Non-Volatile circuits using SPICE Model Netlists in HSpice Software 🔸 N-bit Division by repeated Subtraction using Verilog - Implemented a Verilog-based division algorithm using successive subtraction, incorporating a finite state machine controller to manage data flow.🔸 Traffic Light Controller with pedestrian crossing functionality using Verilog - Implemented a Verilog-based Traffic Light Controller (TLC), managing traffic flow and pedestrian signals using a finite state machine.🔸BCD Adder Circuit Using Simple Logic Gates and Adder IC.I am seeking opportunities to work with like-minded individuals and organizations that share my passion for electronics. Please don't hesitate to reach out to me.- Mayank Pachaurimayankpachauri.nitt@gmail.com