Michael G. Email & Phone Number

San Jose, Ca, Us

Santa Clara, Ca

- Responsible for authoring and maintaining scripts which automate the construction of our FPGAs in Verilog, SPICE, and proprietary languages- Designed tests for each stage of the hardware design process: tapeout tests for pre-silicon verification, bringup tests for post-silicon verification, and production tests for fault detection on all silicon that returns from manufacturing- Worked on DFT designs, using TestMAX for automated test pattern generation (ATPG)- Debugged designs in VCS simulation and on automated test equipment (ATE)- Drove collaboration with software team to debug place-and-route issues, timing issues, and bitstream generation issues

Santa Cruz, California

- Responsible for several hundred students in undergraduate and graduate computer architecture courses- Lead sections, held office hours, lectured in place of professor during absences, and created course material- Lead a senior design course, managing work direction and timetables for year-long engineering projects

Santa Cruz County, California

- Flexibility to teach any subject in grade levels K-12 throughout the school district- Ability to communicate lesson plan set by the primary teacher in a way that is cohesive to young students- Ability to manage time effectively to balance lessons throughout class period

Napa County, Ca

- Flexibility to teach any subject in grade levels K-12 throughout the school district- Ability to communicate lesson plan set by the primary teacher in a way that is cohesive to young students- Ability to manage time effectively to balance lessons throughout class period

American Canyon, Ca

- Taught K-12 mathematics to children and young adults- Developed specialized techniques to help students understand challenging material.

Master Of Science (M.S.), Computer Engineering, 3.8

Bachelor Of Science (B.S.), Electrical Engineering, 3.0

Activities and Societies: Minor in Philosophy, Fencing ClubEmphasis on digital electronics; core classes focusing on logic design.