Responsible for functional verification of Chip Low dropout linear voltage regulators (CLDOs).

Responsible for performing functional validation for Type C subsystem IP, covered multiple testcases for native, tunneled traffic along with different power cycles for USB, PCIe, TBT, DP protocols which comes under Type C subsystem.

Some key points, I covered during my internship in domain of post silicon validation.• Understanding the SoC architecture to create test scenarios.• Understanding different test cards for Type C subsystem validation & hardware setup hands on.• Knowledge on USB, PCIe protocols validation and feature.• Working on automation & pre silicon activities for Type C Subsystem IP.

Students Placement Representative in-charge for the post graduate batch of VLSI Design (2020-2022).Working as a link between the students and the organizations visiting for campus recruitment.

Got the understanding of various telecommunication technologies. Basics of IP, Networking, Digital transmission system are covered with some good practical exposure.