Patrick Shea Email & Phone Number

Melbourne, Florida, United States

Leading a small R&D team in pursuit of disruptive high reliability power MOSFET technology.

Technical lead and manager for discrete power MOSFET R&D at Renesas Electronics America.Developed MOSFET processes and released derivative High-Side and Low-Side FETs for Digital Multiphase Smart Power Stages (SPS) for AMD and Intel computer mainboard core power.

Technical lead and manager for discrete power MOSFET R&D at Intersil.MOSFET engineering for Digital Multiphase Smart Power Stages. Intersil was acquired by Renesas in February 2017.

GWS was acquired by Intersil in 2015 and became the core team for Power MOSFET R&D at Renesas Electronics America. We developed a variety of high performance power MOSFET processes and discrete FET products for the infrastructure server and aerospace DC-DC converter markets. Customer applications exhibited best in class efficiency and power density in both markets. Products:- Diverse family of novel Space-Qualified (MIL-STD) discrete MOSFET technologies with best in class SEGR safe operating area and electrical FOMs. Enabled disruptive rad-hard DC-DC converter technology currently in flight.- Three generations of low-voltage discrete lateral MOSFETs with best in class FOM for resonant DC-DC converters widely adopted in the infrastructure server market. - 15V, 30V, 60V, & 80V Shielded Gate LDMOS processes. Implemented in both discrete MOSFETs and high-current monolithic power stages.- 6V/40A Dual Gate Power NMOS with 9 mOhm-nC RDSON x QGtot FOM optimized for 3.3V gate drive. Patented novel buried tungsten process which significantly reduced both cell pitch and wafer warpage.- 15V to 200V Resurf LDMOS processes in bulk silicon and SOI for power switching applications. Includes shielded gate, double resurf, and superjunction.- 3V to 12V NMOS processes engineered to provide ultra-low RDSON(sp) for high-current inductive load switching applications.Responsibilities Included:- Creating novel device concepts- Process development and integration - Test mask definition and layout- DOE synthesis, tracking, and data analysis- TCAD process, device, and mixed-mode simulation- Reliability assurance test and characterization methodology development- Radiation hardness assurance methodology development and testing- Customer interface (USA)- Foundry interface (USA and Asia)- Product definition and specification- Patents- University collaboration- Recruiting

Doctor Of Philosophy (Ph.D.), Electrical Engineering

Microelectronics Focus Research Assistant Power Semiconductor Research Laboratory Advisor: John Shen Dissertation: “Radiation-Hard Power.

Master Of Science - Ms, Electrical Engineering

Microelectronics Focus Graduate Research Assistant Power Semiconductor Research Laboratory Advisor: John Shen Thesis: “Radiation-Hard.

Bachelor Of Science - Bs, Electrical Engineering

Microelectronics track Undergraduate Research Assistant UCF Power Semiconductor Research Laboratory Advisor: John Shen - Presented Deep.